M-Channel Fast Hartley Transform Based Integer DCT for Lossy-to-Lossless Image Coding

This paper presents an M-channel (M=2n (n ∈ N)) integer discrete cosine transforms (IntDCTs) based on fast Hartley transform (FHT) for lossy-to-lossless image coding which has image quality scalability from lossy data to lossless data. Many IntDCTs with lifting structures have already been presented to achieve lossy-to-lossless image coding. Recently, an IntDCT based on direct-lifting of DCT/IDCT, which means direct use of DCT and inverse DCT (IDCT) to lifting blocks, has been proposed. Although the IntDCT shows more efficient coding performance than any conventional IntDCT, it entails many computational costs due to an extra information that is a key point to realize its direct-lifting structure. On the other hand, the almost conventional IntDCTs without an extra information cannot be easily expanded to a larger size than the standard size M=8, or the conventional IntDCT should be improved for efficient coding performance even if it realizes an arbitrary size. The proposed IntDCT does not need any extra information, can be applied to size M=2n for arbitrary n, and shows better coding performance than the conventional IntDCTs without any extra information by applying the direct-lifting to the pre- and post-processing block of DCT. Moreover, the proposed IntDCT is implemented with a half of the computational cost of the IntDCT based on direct-lifting of DCT/IDCT even though it shows the best coding performance

Проектирование процессора вычисления дискретного косинусного преобразования для систем сжатия изображения по схеме losless-to-lossy

Today, mobile multimedia systems that use the H.261 / 3/4/5, MPEG-1/2/4 and JPEG standards for encoding / decoding video, audio and images are widely spread [1–4]. The core of these standards is the discrete cosine  transform  (DCT)  of  I,  II,  III  ...  VIII  types  [DCT].  Wide support  in  a  huge  number  of  multimedia applications of the JPEG format by circuitry and software solutions and the need for image coding according to the  L2L  scheme  determines  the  relevance  of  the  problem  of  creating  a  decorrelated  transformation  based  on DCT and methods for rapid prototyping of processors for computing an integer DCT on programmable systems on a FPGA chip. At the same time, such characteristics as structural regularity, modularity, high computational parallelism,  low  latency  and  power  consumption  are  taken  into  account.  Direct  and  inverse  transformation should be carried out according to the “whole-to-whole” processing scheme with preservation of the perfective reconstruction  of  the  original  image  (the  coefficients  are  represented  by  integer  or  binary  rational  numbers; the number of multiplication operations is minimal, if possible, they are excluded from the algorithm). The wellknown  integer  DCTs  (BinDCT,  IntDCT)  do  not  give  a  complete  reversible  bit  to  bit  conversion.  To  encode an image  according  to  the  L2L  scheme,  the  decorrelated  transform must be reversible and implemented in integer  arithmetic,  i. e.  the  conversion  would  follow  an  “integer-to-integer”  processing  scheme  with  a minimum  number  of  rounding  operations  affecting  the  compactness of  energy  in  equivalent  conversion subbands. This article shows how, on the basis of integer forward and inverse DCTs, to create a new universal architecture of decorrelated transform on FPGAs for transformational image coding systems that operate on the principle of “lossless-to-lossy” (L2L), and to obtain the best experimental results for objective and subjective performance compared to comparable compression systems.На  сегодняшний  день  широко  распространены  мобильные  мультимедийные  системы, которые используют стандарты H.261/3/4/5, MPEG-1/2/4 и JPEG длякодирования/декодирования видео, аудио и изображений [1–4]. Ядром этих стандартов является дискретное косинусное преобразование (ДКП) I, II, III … VIII типов [ДКП]. Широкая поддержка в огромном количестве мультимедийных приложений формата  JPEG  схемотехническими и  программными  решениями  и  необходимость  кодирования изображений  по  схеме  L2L  обусловливает  актуальность  проблемы  создания  декоррелирующего преобразования  на  основе  ДКП  и  методов  быстрого  прототипирования  процессоров  вычисления целочисленного ДКП на программируемых системах на кристалле ПЛИС/FPGA. При этом во внимание принимаются  такие  характеристики,  как  структурная  регулярность, модульность,  высокий вычислительный  параллелизм,  малая  латентность  и потребляемая  мощность.  Прямое  и  обратное преобразования  должны  осуществляться  по  схеме  обработки  «целое к  целому»  с  сохранением перфективной  реконструкции  исходного  изображения  (коэффициенты представляются  целыми  или двоичными  рациональными  числами;  число  операций  умножения  минимально,  по  возможности  они исключаются  из  алгоритма).  Известные  целочисленные  ДКП  (BinDCT,IntDCT) не дают полного обратимого  бит  в  бит  преобразования.  Для  кодирования  изображения  по  схеме  L2L  требуется,  чтобы декоррелирующее  преобразование  было  обратимым  и  реализовано  в  целочисленной  арифметике, т. е.  преобразование  соответствовало  бы  схеме  обработки  «целое-в-целое»  при  минимальном  числе операций округления, влияющих на компактность энергии в эквивалентных субполосах преобразования. В  данной  статье  показано,  как  на основе  целочисленного  прямого и  обратного  ДКП  создать  новую универсальную  архитектуру  декоррелирующего  преобразования  на  ПЛИС типа FPGA для систем трансформационного кодирования изображений, которые работают попринципу lossless-to-lossy (L2L), и  получить  лучшие  экспериментальные  результаты  по  объективным  и субъективным  показателям по сравнению с аналогичными системами сжатия

Архитектура процессора вычисления дискретного косинусного преобразования для систем сжатия изображения по схеме losless-to-lossy

The hardware implementations of fixed-point DCT blocks, known as IntDCT [1] and BinDCT [2], require some solutions. One of the main issues is the choice between the implementation of the conversion on FPGA, or the implementation on a digital signal processor (Digital Signal Processor, DSP). Each of the implementations has its own pros and cons. One of the most important advantages of the DSP implementation is the presence of special instructions used in DSP, in particular, the ability to multiply two numbers in one clock cycle. Therefore, with the advent of DSP, the limitation on the number of multiplications in algorithms was removed. On the other hand, when implementing a block on an FPGA, we can limit not ourselves to the bitness of the data (within reasonable limits), we have the ability to parallelize all incoming data and implement specialized computing cores for various tasks. In fact, designing multimedia systems on FPGAs reminds the design of similar systems based on the logic of a small and medium degree of integration. Such an implementation has the same limitations: a relatively small amount of available memory, the need to design basic structural elements (multipliers, divisors), etc. It is the inequality of the addition and multiplication operations when they are implemented on FPGAs that caused the search for DCT algorithms with the smallest number of factors. However, even this is not enough, since the structure of the multiplier is many times more complex than the structure of the adder, which made it necessary to look for ways to transform without using multiplications at all. This article shows how, on the basis of integer direct and inverse DCT and distributed arithmetic, to create a new universal architecture of decorrelated transform on FPGAs without multiplication operations for image transformation coding systems that operate on the principle of lossless-to-lossy (L2L), and to obtain the best experimental results in terms of hardware resources compared to comparable compression systems.Аппаратные реализации блоков дискретного косинусного преобразования (ДКП) на арифметике с фиксированной запятой, известные как IntDCT [1] и BinDCT [2], требуют решения некоторых вопросов. Один из главных вопросов – выбор между реализацией преобразования на ПЛИС или реализацией на цифровом сигнальном процессоре (Digital Signal Processor, DSP). Каждая из реализаций имеет как свои плюсы, так и минусы. Одним из самых главных достоинств реализации на DSP является наличие специальных инструкций, используемых в DSP, в частности, возможность перемножения двух чисел за один такт. Поэтому с появлением DSP было снято ограничение на количество умножений в алгоритмах. С другой стороны, при реализации блока на ПЛИС можно не ограничивать себя разрядностью данных (в разумных пределах), имеется возможность параллельной обработки всех поступающих данных и реализации специализированных вычислительных ядер для различных задач. По сути, проектирование систем мультимедиа на ПЛИС напоминает проектирование схожих систем на логике малой и средней степени интеграции. Такая реализация имеет те же ограничения: относительно малое количество доступной памяти, необходимость проектировать базовые элементы конструкции (умножители, делители) и т. д. Именно неравнозначность операций сложения и умножения при реализации их на ПЛИС и обусловила поиски алгоритмов ДКП с наименьшим числом множителей. Однако даже этого недостаточно, поскольку структура умножителя во много раз сложнее структуры сумматора, что заставило искать способы преобразования без использования умножений вообще. В статье показано, как на основе целочисленного прямого и обратного ДКП и распределенной арифметики создать новую универсальную архитектуру декоррелирующего преобразования на ПЛИС типа FPGA без операций умножения для систем трансформационного кодирования изображений, которые работают по принципу lossless-to-lossy (L2L), и получить лучшие экспериментальные результаты по аппаратным ресурсам по сравнению с аналогичными системами сжатия

Dual-DCT-Lifting-Based Lapped Transform with Improved Reversible Symmetric Extension

We present a lifting-based lapped transform (L-LT) and a reversible symmetric extension (RSE) in the boundary processing for more effective lossy-to-lossless image coding of data with various qualities from only one piece of lossless compressed data. The proposed dual-DCT-lifting-based LT (D2L-LT) parallel processes two identical LTs and consists of 1-D and 2-D DCT-liftings which allow the direct use of a DCT matrix in each lifting coefficient. Since the DCT-lifting can utilize any existing DCT software or hardware, it has great potential for elegant implementations that are dependent on the architecture and DCT algorithm used. In addition, we present an improved RSE (IRSE) that works by recalculating the boundary processing and solves the boundary problem that the DCT-lifting-based L-LT (DL-LT) has. We show that D2L-LT with IRSE mostly outperforms conventional L-LTs in lossy-to-lossless image coding

Mathematical transforms and image compression: A review

It is well known that images, often used in a variety of computer and other scientific and engineering applications, are difficult to store and transmit due to their sizes. One possible solution to overcome this problem is to use an efficient digital image compression technique where an image is viewed as a matrix and then the operations are performed on the matrix. All the contemporary digital image compression systems use various mathematical transforms for compression. The compression performance is closely related to the performance by these mathematical transforms in terms of energy compaction and spatial frequency isolation by exploiting inter-pixel redundancies present in the image data. Through this paper, a comprehensive literature survey has been carried out and the pros and cons of various transform-based image compression models have also been discussed

Novel entropy coding and its application of the compression of 3D image and video signals

This thesis was submitted for the award of Doctor of Philosophy and was awarded by Brunel University LondonThe broadcast industry is moving future Digital Television towards Super high resolution TV (4k or 8k) and/or 3D TV. This ultimately will increase the demand on data rate and subsequently the demand for highly efficient codecs. One of the techniques that researchers found it one of the promising technologies in the industry in the next few years is 3D Integral Image and Video due to its simplicity and mimics the reality, independently on viewer aid, one of the challenges of the 3D Integral technology is to improve the compression algorithms to adequate the high resolution and exploit the advantages of the characteristics of this technology. The research scope of this thesis includes designing a novel coding for the 3D Integral image and video compression. Firstly to address the compression of 3D Integral imaging the research proposes novel entropy coding which will be implemented first on 2D traditional images content in order to compare it with the other traditional common standards then will be applied on 3D Integra image and video. This approach seeks to achieve high performance represented by high image quality and low bit rate in association with low computational complexity. Secondly, new algorithm will be proposed in an attempt to improve and develop the transform techniques performance, initially by using a new adaptive 3D-DCT algorithm then by proposing a new hybrid 3D DWT-DCT algorithm via exploiting the advantages of each technique and get rid of the artifact that each technique of them suffers from. Finally, the proposed entropy coding will be further implemented to the 3D integral video in association with another proposed algorithm that based on calculating the motion vector on the average viewpoint for each frame. This approach seeks to minimize the complexity and reduce the speed without affecting the Human Visual System (HVS) performance. Number of block matching techniques will be used to investigate the best block matching technique that is adequate for the new proposed 3D integral video algorithm