2,077 research outputs found

    Multiple partial discharge source discrimination with multiclass support vector machines

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    The costs of decommissioning high-voltage equipment due to insulation breakdown are associated to the substitution of the asset and to the interruption of service. They can reach millions of dollars in new equipment purchases, fines and civil lawsuits, aggravated by the negative perception of the grid utility. Thus, condition based maintenance techniques are widely applied to have information about the status of the machine or power cable readily available. Partial discharge (PD) measurements are an important tool in the diagnosis of power systems equipment. The presence of PD can accelerate the local degradation of insulation systems and generate premature failures. Conventionally, PD classification is carried out using the phase resolved partial discharge (PRPD) pattern of pulses

    Applications of Computational Intelligence to Power Systems

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    In power system operation and control, the basic goal is to provide users with quality electricity power in an economically rational degree for power systems, and to ensure their stability and reliability. However, the increased interconnection and loading of the power system along with deregulation and environmental concerns has brought new challenges for electric power system operation, control, and automation. In the liberalised electricity market, the operation and control of a power system has become a complex process because of the complexity in modelling and uncertainties. Computational intelligence (CI) is a family of modern tools for solving complex problems that are difficult to solve using conventional techniques, as these methods are based on several requirements that may not be true all of the time. Developing solutions with these “learning-based” tools offers the following two major advantages: the development time is much shorter than when using more traditional approaches, and the systems are very robust, being relatively insensitive to noisy and/or missing data/information, known as uncertainty

    Dead End Body Component Inspections With Convolutional Neural Networks Using UAS Imagery

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    This work presents a novel system utilizing previously developed convolutional neural network (CNN) architectures to aid in automating maintenance inspections of the dead-end body component (DEBC) from high-tension power lines. To maximize resolution of inspection images gathered via unmanned aerial systems (UAS), two different CNNs were developed. One to detect and crop the DEBC from an image. The second to classify the likelihood the component in question contains a crack. The DEBC detection CNN utilized a Python implementation of Faster R-CNN fine-tuned for three classes via 270 inspection photos collected during UAS inspection, alongside 111 images from provided simulated imagery. The data was augmented to develop 2,707 training images. The detection was tested with 111 UAS inspections images. The resulting CNN was capable of 97.8% accuracy in detecting and cropping DEBC welds. To train the classification CNN if the DEBC weld region cropped from the DEBC detection CNN was cracked, 1,149 manually cropped images from both the simulated images, as well images collected of components previously replaced both inside and outside a warehouse, were augmented to provide a training set of 4,632 images. The crack detection network was developed using the VGG16 model implemented with the Caffe framework. Training and testing of the crack detection CNNs performance was accomplished using a random 5-fold cross validation strategy resulting in an overall 98.8% accuracy. Testing the combined object detection and crack classification networks on the same 5-fold cross validation test images resulted in an average accuracy of 73.79%

    The characterisation and automatic classification of transmission line faults

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    Includes bibliographical references.A country's ability to sustain and grow its industrial and commercial activities is highly dependent on a reliable electricity supply. Electrical faults on transmission lines are a cause of both interruptions to supply and voltage dips. These are the most common events impacting electricity users and also have the largest financial impact on them. This research focuses on understanding the causes of transmission line faults and developing methods to automatically identify these causes. Records of faults occurring on the South African power transmission system over a 16-year period have been collected and analysed to find statistical relationships between local climate, key design parameters of the overhead lines and the main causes of power system faults. The results characterize the performance of the South African transmission system on a probabilistic basis and illustrate differences in fault cause statistics for the summer and winter rainfall areas of South Africa and for different times of the year and day. This analysis lays a foundation for reliability analysis and fault pattern recognition taking environmental features such as local geography, climate and power system parameters into account. A key aspect of using pattern recognition techniques is selecting appropriate classifying features. Transmission line fault waveforms are characterised by instantaneous symmetrical component analysis to describe the transient and steady state fault conditions. The waveform and environmental features are used to develop single nearest neighbour classifiers to identify the underlying cause of transmission line faults. A classification accuracy of 86% is achieved using a single nearest neighbour classifier. This classification performance is found to be superior to that of decision tree, artificial neural network and naĂŻve Bayes classifiers. The results achieved demonstrate that transmission line faults can be automatically classified according to cause

    Principles of Neuromorphic Photonics

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    In an age overrun with information, the ability to process reams of data has become crucial. The demand for data will continue to grow as smart gadgets multiply and become increasingly integrated into our daily lives. Next-generation industries in artificial intelligence services and high-performance computing are so far supported by microelectronic platforms. These data-intensive enterprises rely on continual improvements in hardware. Their prospects are running up against a stark reality: conventional one-size-fits-all solutions offered by digital electronics can no longer satisfy this need, as Moore's law (exponential hardware scaling), interconnection density, and the von Neumann architecture reach their limits. With its superior speed and reconfigurability, analog photonics can provide some relief to these problems; however, complex applications of analog photonics have remained largely unexplored due to the absence of a robust photonic integration industry. Recently, the landscape for commercially-manufacturable photonic chips has been changing rapidly and now promises to achieve economies of scale previously enjoyed solely by microelectronics. The scientific community has set out to build bridges between the domains of photonic device physics and neural networks, giving rise to the field of \emph{neuromorphic photonics}. This article reviews the recent progress in integrated neuromorphic photonics. We provide an overview of neuromorphic computing, discuss the associated technology (microelectronic and photonic) platforms and compare their metric performance. We discuss photonic neural network approaches and challenges for integrated neuromorphic photonic processors while providing an in-depth description of photonic neurons and a candidate interconnection architecture. We conclude with a future outlook of neuro-inspired photonic processing.Comment: 28 pages, 19 figure

    Extraction of Key-Frames from an Unstable Video Feed

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    The APOLI project deals with Automated Power Line Inspection using Highly-automated Unmanned Aerial Systems. Beside the Real-time damage assessment by on-board high-resolution image data exploitation a postprocessing of the video data is necessary. This Master Thesis deals with the implementation of an Isolator Detector Framework and a Work ow in the Automotive Data and Time-triggered Framework(ADTF) that loads a video direct from a camera or from a storage and extracts the Key Frames which contain objects of interest. This is done by the implementation of an object detection system using C++ and the creation of ADTF Filters that perform the task of detection of the objects of interest and extract the Key Frames using a supervised learning platform. The use case is the extraction of frames from video samples that contain Images of Isolators from Power Transmission Lines

    An instruction systolic array architecture for multiple neural network types

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    Modern electronic systems, especially sensor and imaging systems, are beginning to incorporate their own neural network subsystems. In order for these neural systems to learn in real-time they must be implemented using VLSI technology, with as much of the learning processes incorporated on-chip as is possible. The majority of current VLSI implementations literally implement a series of neural processing cells, which can be connected together in an arbitrary fashion. Many do not perform the entire neural learning process on-chip, instead relying on other external systems to carry out part of the computation requirements of the algorithm. The work presented here utilises two dimensional instruction systolic arrays in an attempt to define a general neural architecture which is closer to the biological basis of neural networks - it is the synapses themselves, rather than the neurons, that have dedicated processing units. A unified architecture is described which can be programmed at the microcode level in order to facilitate the processing of multiple neural network types. An essential part of neural network processing is the neuron activation function, which can range from a sequential algorithm to a discrete mathematical expression. The architecture presented can easily carry out the sequential functions, and introduces a fast method of mathematical approximation for the more complex functions. This can be evaluated on-chip, thus implementing the entire neural process within a single system. VHDL circuit descriptions for the chip have been generated, and the systolic processing algorithms and associated microcode instruction set for three different neural paradigms have been designed. A software simulator of the architecture has been written, giving results for several common applications in the field
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