Reactive Programming of Simulations in Physics

We consider the Reactive Programming (RP) approach to simulate physical systems. The choice of RP is motivated by the fact that RP genuinely offers logical parallelism, instantaneously broadcast events, and dynamic creation/destruction of parallel components and events. To illustrate our approach, we consider the implementation of a system of Molecular Dynamics, in the context of Java with the Java3D library for 3D visualisation

Recent results and perspectives on cosmology and fundamental physics from microwave surveys

Recent cosmic microwave background data in temperature and polarization have reached high precision in estimating all the parameters that describe the current so-called standard cosmological model. Recent results about the integrated Sachs-Wolfe effect from cosmic microwave background anisotropies, galaxy surveys, and their cross-correlations are presented. Looking at fine signatures in the cosmic microwave background, such as the lack of power at low multipoles, the primordial power spectrum and the bounds on non-Gaussianities, complemented by galaxy surveys, we discuss inflationary physics and the generation of primordial perturbations in the early Universe. Three important topics in particle physics, the bounds on neutrinos masses and parameters, on thermal axion mass and on the neutron lifetime derived from cosmological data are reviewed, with attention to the comparison with laboratory experiment results. Recent results from cosmic polarization rotation analyses aimed at testing the Einstein equivalence principle are presented. Finally, we discuss the perspectives of next radio facilities for the improvement of the analysis of future cosmic microwave background spectral distortion experiments.Comment: 27 pages, 9 figures. Review Article. International Journal of Modern Physics D, in press. [Will appear also on the proceedings of the Fourteenth Marcel Grossmann Meeting University of Rome "La Sapienza" - Rome, July 12-18, 2015 (http://www.icra.it/mg/mg14/), eds. Robert T. Jantzen, Kjell Rosquist, Remo Ruffini. World Scientific, Singapore

The Art of Fault Injection

Classical greek philosopher considered the foremost virtues to be temperance, justice, courage, and prudence. In this paper we relate these cardinal virtues to the correct methodological approaches that researchers should follow when setting up a fault injection experiment. With this work we try to understand where the "straightforward pathway" lies, in order to highlight those common methodological errors that deeply influence the coherency and the meaningfulness of fault injection experiments. Fault injection is like an art, where the success of the experiments depends on a very delicate balance between modeling, creativity, statistics, and patience

From FPGA to ASIC: A RISC-V processor experience

This work document a correct design flow using these tools in the Lagarto RISC- V Processor and the RTL design considerations that must be taken into account, to move from a design for FPGA to design for ASIC

Understanding analogical reasoning : viewpoints from psychology and related disciplines

Analogy and metaphor have a long history of study in linguistics, education, philosophy and psychology. Consensus over what analogy is or how analogy functions in language and thought, however, has been elusive. This paper, the first in a two part series, examines these various research traditions, attempting to bring out major lines of agreement over the role of analogy in individual human experience. As well as being a general literature review which may be helpful for newcomers to the study of analogy, this paper attempts to extract from these literatures existing theories, models and concepts which may be interesting or useful for computational studies of analogical reasoning

Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review

The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range. Such inversely proportional decline in size and boost in performance consequently demands shrinking of supply voltage and effective power dissipation in chips with millions of transistors. This has triggered substantial amount of research in power reduction techniques into almost every aspect of the chip and particularly the processor cores contained in the chip. This paper presents an overview of techniques for achieving the power efficiency mainly at the processor core level but also visits related domains such as buses and memories. There are various processor parameters and features such as supply voltage, clock frequency, cache and pipelining which can be optimized to reduce the power consumption of the processor. This paper discusses various ways in which these parameters can be optimized. Also, emerging power efficient processor architectures are overviewed and research activities are discussed which should help reader identify how these factors in a processor contribute to power consumption. Some of these concepts have been already established whereas others are still active research areas. © 2009 ACADEMY PUBLISHER