A Low-Power Silicon-Photomultiplier Readout ASIC for the CALICE Analog Hadronic Calorimeter

The future e + e − collider experiments, such as the international linear collider, provide precise measurements of the heavy bosons and serve as excellent tests of the underlying fundamental physics. To reconstruct these bosons with an unprecedented resolution from their multi-jet final states, a detector system employing the particle flow approach has been proposed, requesting calorimeters with imaging capabilities. The analog hadron calorimeter based on the SiPM-on-tile technology is one of the highly granular candidates of the imaging calorimeters. To achieve the compactness, the silicon-photomultiplier (SiPM) readout electronics require a low-power monolithic solution. This thesis presents the design of such an application-specific integrated circuit (ASIC) for the charge and timing readout of the SiPMs. The ASIC provides precise charge measurement over a large dynamic range with auto-triggering and local zero-suppression functionalities. The charge and timing information are digitized using channel-wise analog-to-digital and time-to-digital converters, providing a fully integrated solution for the SiPM readout. Dedicated to the analog hadron calorimeter, the power-pulsing technique is applied to the full chip to meet the stringent power consumption requirement. This work also initializes the commissioning of the calorimeter layer with the use of the designed ASIC. An automatic calibration procedure has been developed to optimized the configuration settings for the chip. The new calorimeter base unit with the designed ASIC has been produced and its functionality has been tested

Systems-on-Chip (SoC) for applications in High-Energy Physics

In view of the Time Projection Chamber for the future Linear Collider (LCTPC), a new front-end Application-Specific Integrated Circuit has been developed: the 16 channels Super-Altro Demonstrator. Given the small pad area of 1mm x 4mm, the chip is a compact integrated system, including signal preamplification/shaping, 10-bit analog-to-digital conversion and digital signal processing. Adequate design techniques were used to reduce noise coupling between analog and digital parts of the system. The bunch train structure of the linear collider is exploited by the introduction of power pulsing features in the design, which result in a significant reduction of the power consumption. The tests carried out show noise as low as 316 electrons and effectiveness of the power pulsing approach. Super-Altro can be used for studies of gaseous detector readout with classical wire chambers as well as modern GEMs and MicroMegas. This thesis also studies Analog-to-Digital Converters (ADC) suitable for integration in High-Energy Physics front-end systems. Simulations show the feasibility of a 12-bit 100MHz pipeline ADC in a 130nm CMOS technology

Integral Control Action in Precise Positioning Systems with Friction

-For high precision positioning systems a fast and accurate settling to the reference state is most significant and, at the same time, challenging from the control point of view. Traditional use of an integral coaction in feedback can attain a desired reference tracking at steady-state motion, but can fail in case of precise positioning. Most crucial is that this is independent on how accurate the integral control part is tuned. This paper addresses the feedback control action in precise positioning systems with friction. Analyzing the closed-loop control dynamics with nonlinear friction in feedback it is shown why the integral action cannot efficiently cope with Coulomb friction which becomes time-varying at motion onsets and reversals. The latter leads to the reduced control performance expressed in desired immediate stop at the reference position. The nature of presliding friction as functional of positioning control error, in vicinity to the reference position, and not as function of the time argument, is postulated as main disturbing factor that limits efficiency of the integral control coaction. The conclusions drawn in performed analysis are also reinforced by the demonstrated numerical examples of a controlled motion with nonlinear friction

Using input shaping to minimize residual vibration in flexible space structures

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 1995.Includes bibliographical references (p. 115-118).by Kristen Andrea Bohlke.M.S

LOW-VOLTAGE LOW-POWER ANALOG-TO-DIGITAL CONVERTERS

Ph.DDOCTOR OF PHILOSOPH

Studies and development of a readout ASIC for pixelated CdTe detectors for space applications

Le travail présenté dans ce manuscrit a été effectué au sein de l équipe de microélectronique de l Institut de Recherche sur les lois Fondamentales de l Univers (IRFU) du CEA. Il s inscrit dans le contexte de la spectro-imagerie X et gamma pour la recherche en Astrophysique. Dans ce domaine, les futures expériences embarquées à bords de satellites nécessiteront des instruments d imagerie à très hautes résolutions spatiales et énergétiques.La résolution spectrale d une gamma-camera est dégradée par l imperfection du détecteur lors de l interaction photon-matière lui-même et par le bruit électronique. Si on ne peut réduire l imprécision de conversion photon-charge du détecteur, on peut minimiser le bruit apporté par l électronique de lecture. L objectif de cette thèse est la conception d une électronique intégrée de lecture de détecteur semi-conducteurs CdTe pixélisés pour gamma-caméra(s) compacte(s) et aboutable(s) sur 4 côtés à résolution spatiale Fano limitée . Les objectifs principaux de ce circuit intégré sont: un très bas bruit pour la mesure d énergie des rayons-X, une très basse consommation, et une taille de canal de détection adaptée au pas des pixels CdTe. Pour concevoir une telle électronique, chaque paramètre contribuant au bruit doit être optimisé. L hybridation entre l électronique de lecture et le détecteur est également un paramètre clef qui fait généralement la résolution finale de l instrument : en imposant une géométrie matricielle à l ASIC adaptée au pas de 300 m des pixels de CdTe, on peut espérer, réduire d un facteur 10 la capacité parasite amenée par la connexion détecteur-électronique et améliorer d autant le bruit électronique tout en conservant une densité de puissance constante. Une bonne connaissance des propriétés du détecteur nous permet alors d extraire ses paramètres électroniques clefs pour concevoir l architecture électronique de conversion et de filtrage optimale. Dans le cadre de cette thèse j ai conçu deux circuits intégrés en technologies CMOS XFAB 0.18 m. Le premier, Caterpylar, est destiné à caractériser cette nouvelle technologie, y compris en radiation, identifier un étage d entrée pour le pixel adapté au détecteur, et valider par la mesure les résultats théoriques établis sur deux architectures de filtrage, semi gaussien et Multi-Correlated Double Sampling (MCDS), approchant l efficacité du filtrage optimal et adaptées aux applications finales. Le deuxième circuit, D2R1, est un système complet, constitué de 256 canaux de lecture de détecteur CdTe, organisés dans une matrice de 16.16 pixels. Chaque canal comprend un préamplificateur de charge adapté à des pixels de 300 m.300 m, un opérateur de filtrage de type MCDS de profondeur programmable, d un discriminateur auto-déclenché à bas seuil de détection programmable par canal. L ASIC a été caractérisé sans détecteur et est en voie d être hybridé à une matrice de CdTe très prochainement. Les résultats de caractérisations de la puce nue, en particulier en terme de produit puissance . bruit, sont excellents. La consommation de la puce est de 315 W/ canal, la charge équivalente de bruit mesurée sur tous les canaux est de 29 électrons rms. Ces résultats valident le choix d intégration d un filtrage de type MCDS, qui est, à notre connaissance une première mondiale pour la lecture de détecteurs CdTe. Par ailleurs, ils nous permettent d envisager d excellentes résolutions spectrales de l ensemble détecteur+ASIC, de l ordre de 600 eV FWHM à 60 keV.The work presented in this thesis is part of a project where a new instrument is developed: a camera for hard X-rays imaging spectroscopy. It is dedicated to fundamental research for observations in astrophysics, at wavelengths which can only be observed using space-borne instruments. In this domain the spectroscopic accuracy as well as the imaging details are of high importance. This work has been realized at CEA/IRFU (Institut de Recherche sur les lois Fondamentales de l Univers), which has a long-standing and successful experience in instruments for high energy physics and space physics instrumentation. The objective of this thesis is the design of the readout electronics for a pixelated CdTe detector, suitable for a stacked assembly. The principal parameters of this integrated circuit are a very low noise for reaching a good accuracy in X-ray energy measurement, very low power consumption, a critical parameter in space-borne applications, and a small dead area for the full system combining the detector and the readout electronics. In this work I have studied the limits of these three parameters in order to optimize the circuit.In terms of the spectral resolution, two categories of noise had to be distinguished to determine the final performance. The first is the Fano noise limit. related to detector interaction statistics, which cannot be eliminated. The second is the electronic noise, also unavoidable; however it can be minimized through optimization of the detection chain. Within the detector, establishing a small pixel pitch of 300 m reduces the input capacitance and the dark current. This limits the effects of the electronic noise. Also in order to limit the input capacitance the future camera is designed as a stacked assembly of the detector with the readout ASIC. This allows to reach extremely good input parameters seen by the readout electronics: a capacitance in range of 0.3 pF - 1 pF and a dark current below 5 pA.In the frame of this thesis I have designed two ASICs. The first one, Caterpylar, is a testchip, which enables the characterization of differently dimensioned CSA circuits to choose the most suitable one for the final application. It is optimized for readout of the target CdTe detector with 300 m pixel pitch and the corresponding input parameters. With this circuit I have also analyzed possible filtering methods, in particular the semi-Gaussian shaping and the Multi-Correlated Double Sampling (MCDS). Their comparison is preceded by the theoretical analysis of these shapers. The second ASIC D2R1 is a complete readout circuit, containing 256 channels to readout CdTe detector with the same number of pixels, arranged in 16.16 array. Each channel fits into a layout area of 300 m . 300 m. It is based on the MCDS processing with self-triggering capabilities. The mean electronic noise measured over all channels is 29 electrons rms when characterized without the detector. The corresponding power consumption is 315 W channel. With these results the future measurements with the detector give prospects for reaching an FWHM spectral resolution in the order of 600 eV at 60 keV.PARIS11-SCD-Bib. électronique (914719901) / SudocSudocFranceF

Axiomatic development of a machine control system

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 2000.Includes bibliographical references (leaf 140).Axiomatic Design is presented as a scientific methodology in designing a complex machine control system. As an example, the CMP a machine control system is developed using the Axiomatic Design framework. The machine is a type of semiconductor processing equipment, which requires numerous actuators and sensors and the intelligent control of them to planarize thin layers of wafers. Signal processing modules, control algorithms, sequential process steps, graphical user interface, process recipe editor and the overall control system structure are all designed by the Axiomatic decomposition. Axiomatic Design is proved to be a very effective tool in control system development. It took less than six months to develop the system and the control system is fully functional without any major error or mistake. The resulting system is clear to understand, easy to maintain and upgrade, and flexible for further development and integration. Although the development has been specific to the CMP cc machine, the control system structure and the design methodologies presented in this thesis are universally applicable to the development of any type of machine control system.by Kwangduk Douglas Lee.S.M