Developing Efficient Discrete Simulations on Multicore and GPU Architectures

In this paper we show how to efficiently implement parallel discrete simulations on multicoreandGPUarchitecturesthrougharealexampleofanapplication: acellularautomatamodel of laser dynamics. We describe the techniques employed to build and optimize the implementations using OpenMP and CUDA frameworks. We have evaluated the performance on two different hardware platforms that represent different target market segments: high-end platforms for scientific computing, using an Intel Xeon Platinum 8259CL server with 48 cores, and also an NVIDIA Tesla V100GPU,bothrunningonAmazonWebServer(AWS)Cloud;and on a consumer-oriented platform, using an Intel Core i9 9900k CPU and an NVIDIA GeForce GTX 1050 TI GPU. Performance results were compared and analyzed in detail. We show that excellent performance and scalability can be obtained in both platforms, and we extract some important issues that imply a performance degradation for them. We also found that current multicore CPUs with large core numbers can bring a performance very near to that of GPUs, and even identical in some cases.Ministerio de Economía, Industria y Competitividad, Gobierno de España (MINECO), and the Agencia Estatal de Investigación (AEI) of Spain, cofinanced by FEDER funds (EU) TIN2017-89842

Parallel Implementations of Cellular Automata for Traffic Models

The Biham-Middleton-Levine (BML) traffic model is a simple two-dimensional, discrete Cellular Automaton (CA) that has been used to study self-organization and phase transitions arising in traffic flows. From the computational point of view, the BML model exhibits the usual features of discrete CA, where the state of the automaton are updated according to simple rules that depend on the state of each cell and its neighbors. In this paper we study the impact of various optimizations for speeding up CA computations by using the BML model as a case study. In particular, we describe and analyze the impact of several parallel implementations that rely on CPU features, such as multiple cores or SIMD instructions, and on GPUs. Experimental evaluation provides quantitative measures of the payoff of each technique in terms of speedup with respect to a plain serial implementation. Our findings show that the performance gap between CPU and GPU implementations of the BML traffic model can be reduced by clever exploitation of all CPU features

Implicit Simulations using Messaging Protocols

A novel algorithm for performing parallel, distributed computer simulations on the Internet using IP control messages is introduced. The algorithm employs carefully constructed ICMP packets which enable the required computations to be completed as part of the standard IP communication protocol. After providing a detailed description of the algorithm, experimental applications in the areas of stochastic neural networks and deterministic cellular automata are discussed. As an example of the algorithms potential power, a simulation of a deterministic cellular automaton involving 10^5 Internet connected devices was performed.Comment: 14 pages, 3 figure

Cellular Automaton Belousov-Zhabotinsky Model for Binary Full Adder

© 2017 World Scientific Publishing Company. The continuous increment in the performance of classical computers has been driven to its limit. New ways are studied to avoid this oncoming bottleneck and many answers can be found. An example is the Belousov-Zhabotinsky (BZ) reaction which includes some fundamental and essential characteristics that attract chemists, biologists, and computer scientists. Interaction of excitation wave-fronts in BZ system, can be interpreted in terms of logical gates and applied in the design of unconventional hardware components. Logic gates and other more complicated components have been already proposed using different topologies and particular characteristics. In this study, the inherent parallelism and simplicity of Cellular Automata (CAs) modeling is combined with an Oregonator model of light-sensitive version of BZ reaction. The resulting parallel and computationally-inexpensive model has the ability to simulate a topology that can be considered as a one-bit full adder digital component towards the design of an Arithmetic Logic Unit (ALU)

On computing in fine-grained compartmentalised Belousov-Zhabotinsky medium

We introduce results of computer experiments on information processing in a hexagonal array of vesicles filled with Belousov-Zhabotinsky (BZ) solution in a sub-excitable mode. We represent values of Boolean variables by excitation wave-fragments and implement basic logical gates by colliding the wave-fragments. We show that a vesicle filled with BZ mixture can implement a range of basic logical functions. We cascade BZ-vesicle logical gates into arithmetic circuits implementing addition of two one-bit binary numbers. We envisage that our theoretical results will be applied in chemical laboratory designs of massive-parallel computers based on fine-grained compartmentalisation of excitable chemical systems