Authentication of electronics components for cyber-physical systems

One of the main directions of cyber-physical systems safety ensuring is the creation and implementation of technologies for providing the electronics components a resistance to various types of external influences. The relevance of this problem is the increase of a rate of counterfeit products in electronics as an international trend. This determines a need to authenticate the products intended for responsible applications. In addition to the issue of counterfeit, the electronics components authentication is necessary for a reliable and informative assessment of their resistance to the impacts from external factors. One of the main tasks of the methodology for assessing the resistance is to establish an effective optimal balance between the reliability of the test results and the procedure laboriousness. The difficulties of this optimization are related mainly to the number of destroyed samples, the volume of collected information, ensuring of a counterfeit identification. Hereby we present an effective authentication procedure combining the "destructive" and "non-destructive" types of checks with the counterfeit identification, sample heterogeneity, and suspicious items. Improvement of the sampling procedure for testing is presented as well. The experimental results of authentication are discussed

La sécurité des objets connectés : les défis matériels

International audienceCette présentation fait le point sur les défis matériels pour la sécurité des objets connectés

Security Analysis of Delay-Based Strong PUFs with Multiple Delay Lines

Using a novel circuit design, we investigate if the modeling-resistance of delay-based, CMOS-compatible strong PUFs can be increased by the usage of multiple delay lines. Studying a circuit inspired by the Arbiter PUF, but using four instead of merely two delay lines, we obtain evidence showing that the usage of many delay lines does not significantly increase the security of the strong PUF circuit. Based on our findings, we suggest future research directions

Hybrid low-voltage physical unclonable function based on inkjet-printed metal-oxide transistors

Modern society is striving for digital connectivity that demands information security. As an emerging technology, printed electronics is a key enabler for novel device types with free form factors, customizability, and the potential for large-area fabrication while being seamlessly integrated into our everyday environment. At present, information security is mainly based on software algorithms that use pseudo random numbers. In this regard, hardware-intrinsic security primitives, such as physical unclonable functions, are very promising to provide inherent security features comparable to biometrical data. Device-specific, random intrinsic variations are exploited to generate unique secure identifiers. Here, we introduce a hybrid physical unclonable function, combining silicon and printed electronics technologies, based on metal oxide thin film devices. Our system exploits the inherent randomness of printed materials due to surface roughness, film morphology and the resulting electrical characteristics. The security primitive provides high intrinsic variation, is non-volatile, scalable and exhibits nearly ideal uniqueness

Modeling attacks on physical unclonable functions

We show in this paper how several proposed Physical Unclonable Functions (PUFs) can be broken by numerical modeling attacks. Given a set of challenge-response pairs (CRPs) of a PUF, our attacks construct a computer algorithm which behaves indistinguishably from the original PUF on almost all CRPs. This algorithm can subsequently impersonate the PUF, and can be cloned and distributed arbitrarily. This breaks the security of essentially all applications and protocols that are based on the respective PUF. The PUFs we attacked successfully include standard Arbited PUFs and Ring Oscillator PUFs of arbitrary sizes, and XO Arbiter PUFs, Lightweight Secure PUFs, and Feed-Forward Arbiter PUFs of up to a given size and complexity. Our attacks are based upon various machine learning techniques including Logistic Regression and Evolution Strategies. Our work leads to new design requirements for secure electrical PUFs, and will be useful to PUF designers and attackers alike.Technische Universitat Munche

Towards Attack Resilient Arbiter PUF-Based Strong PUFs

We present the LP-PUF, a novel, Arbiter PUF-based, CMOS-compatible strong PUF design. We explain the motivation behind the design choices for LP-PUF and show evaluation results to demonstrate that LP-PUF has good uniqueness, low bias, and fair bit sensitivity and reliability values. Furthermore, based on analyses and discussion of the LR and splitting attacks, the reliability attacks, and MLP attack, we argue that the LP-PUF has potential to be secure against known PUF modeling attacks, which motivates a discussion of limitations of our study and future work with respect to the LP-PUF