641 research outputs found

    Fade-in and fade-out detection in video sequences using histograms

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    SNDR sensitivity analysis for cascaded ΣΔ modulators

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    Simplex minimisation for multiple-reference motion estimation

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    Image convolution using a probabilistic mapper on USB-AER board

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    In this demo we propose a method for computing real time convolution on AER images. For that we use signed events. The AER events produced on an AER retina or an image/video to AER conversor, are processed using a probabilistic multi event mapper that produces more than one event for each incoming event according to an assigned probability. Kernel convolution size are limited by mapping tables size (on board RAM) and AER bus bandwidth. On reconstruction signed events needs to be simplified (subtracted) to get final convolved image. For that two different methods are proposed.Comisión Interministerial de Ciencia y Tecnología TIC-2006-08164-C03-02Junta de Andalucía P06-TIC-0141

    Video special effects editing in MPEG-2 compressed video

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    S frame design for multiple description video coding

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    Multiple description video coding based on zero padding

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    On giant piezoresistance effects in silicon nanowires and microwires

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    The giant piezoresistance (PZR) previously reported in silicon nanowires is experimentally investigated in a large number of surface depleted silicon nano- and micro-structures. The resistance is shown to vary strongly with time due to electron and hole trapping at the sample surfaces. Importantly, this time varying resistance manifests itself as an apparent giant PZR identical to that reported elsewhere. By modulating the applied stress in time, the true PZR of the structures is found to be comparable with that of bulk silicon

    A novel tuning technique for distributed voltage controlled oscillators

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    A novel current-steering delay-balanced tuning technique for distributed voltage controlled oscillators (DVCO) is demonstrated. This tuning technique is used to design a DVCO operating at 10 GHz in a 0.35 μm CMOS technology. The DVCO is continuously tunable between 9.9 and 10.3 GHz. Special attention is paid to the layout issues for the high frequency design
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