6 research outputs found

    Steady state distribution of a hyperbolic digital tanlock loop with extended pull-in range for frequency synchronization in high doppler environment

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    A hyperbolic arctan based Digital Tanlock Loop (D-TLL) operating with complex signals at base-band or intermediate frequencies in high Doppler environments is treated here. The arctan based loop, known as the tanlock loop (TLL), is used in software defined radio architectures for frequency acquisition and tracking. The hyperbolic nonlinearity intentionally introduced within the phase detector extends the pull-in range of the frequency for a given loop, compared to the normal D-TLL, allowing a wider frequency acquisition range which is suitable for high Doppler communications environment. In this paper we study the steady state phase noise performances of such a feedback loop for additive Gaussian noise using stochastic analysis. The stochastic model of a first-order hyperbolic loop and the theoretical analysis for the corresponding statistical distribution of the closed loop steady state phase noise are presented. The theoretical results are also verified by simulations

    Modulador sigma delta basado en capacitores conmutados con amplificadores de ganancia unitaria

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    El diseño de moduladores sigma delta orientados a operar en altas frecuencias depende de la habilidad de los dispositivos de las nuevas tecnologías de operar a dichas frecuencias. El precio a pagar incluye limitaciones impuestas por la delgada litografía respecto de la máxima tensión de alimentación: tensiones de operación por debajo de 1 V son actualmente una nueva regla. El uso de cualquier forma de sobre tensión impacta negativamente la confiabilidad, además de que el uso de otros circuitos con este fin no es práctico debido a la frecuencia de operación exigida. La conmutación de capacitores a alta velocidad impone un límite a la máxima tensión sobre los mismos respecto de tierra, y esto repercute en las posibles implementaciones circuitales. Circuitos pasivos fueron presentados como posibles alternativas para superar estas dificultades pero la técnica tiene limitaciones en términos de ruido debido a la atenuación que sufre la señal y en el tipo de filtros que pueden ser utilizados. La técnica presentada en este trabajo utiliza integradores de muestreo de baja pérdida implementados con buffers de ganancia unitaria como elementos activos, y hace uso de las técnicas de correlated double sampling en todas las etapas para reducir el ruido.Sección: MicroelectrónicaCentro de Técnicas Analógico-Digitale

    Implementing Institute of Electrical and Electronics Engineers (IEEE) 802.11 Standard Medium Access Control Protocol for Wireless Local Area Networks (LANS) on a Laboratory Hardware Prototype

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    Wireless Local Area Networks (LANs) are extremely convenient, flexible, and easy to deploy. All LANs in which multiple hosts must access the same medium use a Medium Access Control (MAC) protocol to coordinate channel access. The MAC is part of the Data Link Layer of the Open Systems Interconnection (OSI) Reference Model. One MAC protocol in extensive use today is the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard. Since IEEE 802.11 devices are so prevalent in today s world, many researcher are exploring modifications and enhancements to the protocol. There are several well developed analytical and simulation models for IEEE 802.11 available to researchers, yet one significant obstacle remains: the lack of a means to obtain experimental data based on proposed protocol changes. Without real world experimental data, researchers lack the ability to test out their proposals in a real world environment. To fill this need, this thesis created a hardware prototype from which researchers can obtain experimental data about IEEE 802.11. This hardware prototype can now be used by researchers to gain real world data on their proposed modifications to IEEE 802.11

    Design and Analysis of OFDM System for Powerline Based Communication

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    Research on digital communication systems has been greatly developed in the past few years and offers a high quality of transmission in both wired and wireless communication environments. Coupled with advances in new modulation techniques, Orthogonal Frequency Division Multiplexing (OFDM) is a well-known digital multicarrier communication technique and one of the best methods of digital data transmission over a limited bandwidth. The main aim of this research is to design an OFDM modem for powerline-based communication in order to propose and examine a novel approach in comparing the different modulation order, different modulation type, application of Forward Error Correction (FEC) scheme and also application of different noise types and applying them to the two modelled channels, Additive White Gaussian Noise (AWGN) and Powerline modelled channel. This is an attempt to understand and recognise the most suitable technique for the transmission of message or image within a communication system. In doing so, MATLAB and embedded Digital Signal Processing (DSP) systems are used to simulate the operation of virtual transmitter and receiver. The simulation results presented in this project suggest that lower order modulation formats (Binary Phase Shift Keying (BPSK) and 4-Quadrature Amplitude Modulation (QAM)), are the most preferred modulation techniques (in both type and order) for their considerable performance. The results also indicated that, Convolutional Channel Encoding (CCE)-Soft and Block Channel Encoding (BCE)-Soft are by far the best encoding techniques (in FEC type) for their best performance in error detection and correction. Indeed, applying these techniques to the two modelled channels has proven very successful and will be accounted as a novel approach for the transmission of message or image within a powerline based communication system

    Analog parallel processor solutions for video encoding

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    This thesis deals with Cellular Nonlinear Network (CNN) analog parallel processor networks and their implementations in current video coding standards. The target applications are low-power video encoders within 3rd generation mobile terminals. The video codecs of such mobile terminals are defined by either the MPEG-4/H.263 or H.264 video standard. All of these standards are based on the block-based hybrid approach. As block-based motion estimation (ME) is responsible for most of the power consumption of such hybrid video encoders, this thesis deals mostly with low-power ME implementations. Low-power solutions are introduced at both the algorithmic and hardware levels. On the algorithmic level, the introduced implementations are derived from a segmentation algorithm, which has previously been partly realized. The first introduced algorithm reduces the computational complexity of ME within an object-based MPEG-4 encoder. The use of this algorithm enables a 60% drop in the power consumption of Full Search ME. The second algorithm calculates a near-optimal block-size partition for H.264 motion estimation. With this algorithm, the use of computationally complex Lagrange optimization in H.264 ME is not required. The third algorithm reduces the shape bit-rate of an object-based MPEG-4 encoder. On the hardware level a CNN-type ME architecture is introduced. The architecture includes connections and circuitry to fully realize block-based ME. The analog ME implemented with this architecture is capable of lower power than comparable digital realizations. A 9×9 test chip has also been realized. Additionally implemented is a digital predictive ME realization that takes advantage of the introduced partition algorithm. Although the IC layout of the ME algorithm was drawn, the design was verified as an FPGA.reviewe

    Libro de Memorias: II Congreso de Microelectrónica Aplicada 2011

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    Este volumen contiene los trabajos presentados para el “Segundo Congreso de Microelectrónica Aplicada (μEA 2011)” que se ha de celebrar en la Ciudad de La Plata durante los días 7, 8 y 9 de Septiembre de 2011. μEA 2011 tiene los siguientes objetivos: • Constituirse en un foro de intercambio de experiencias entre los profesionales y estudiantes de todas las universidades en las áreas de Electrónica. • Comunicar a la sociedad y en nuestro idioma, los logros y resultados obtenidos, en la actividad de investigación dedicada a las aplicaciones de las Micro y Nanotecnologías.. • Incrementar la cooperación entre los grupos industriales y académicos de la Argentina y Latinoamérica con la actividad en el campo de la Microelectrónica y sus Aplicaciones.Centro de Técnicas Analógico-Digitale
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