BioScript: programming safe chemistry on laboratories-on-a-chip

This paper introduces BioScript, a domain-specific language (DSL) for programmable biochemistry which executes on emerging microfluidic platforms. The goal of this research is to provide a simple, intuitive, and type-safe DSL that is accessible to life science practitioners. The novel feature of the language is its syntax, which aims to optimize human readability; the technical contributions of the paper include the BioScript type system and relevant portions of its compiler. The type system ensures that certain types of errors, specific to biochemistry, do not occur, including the interaction of chemicals that may be unsafe. The compiler includes novel optimizations that place biochemical operations to execute concurrently on a spatial 2D array platform on the granularity of a control flow graph, as opposed to individual basic blocks. Results are obtained using both a cycle-accurate microfluidic simulator and a software interface to a real-world platform

Constrained Min-Cut replication for K-Way hypergraph partitioning

Cataloged from PDF version of article.Replication is a widely-used technique in information retrieval and database systems for providing fault tolerance and reducing parallelization and processing costs. Combinatorial models based on hypergraph partitioning are proposed for various problems arising in information retrieval and database systems. We consider the possibility of using vertex replication to improve the quality of hypergraph partitioning. In this study, we focus on the constrained min-cut replication (CMCR) problem, where we are initially given a maximum replication capacity and a K-way hypergraph partition with an initial imbalance ratio. The objective in the CMCR problem is finding the optimal vertex replication sets for each part of the given partition such that the initial cut size of the partition is minimized, where the initial imbalance is either preserved or reduced under the given replication capacity constraint. In this study, we present a complexity analysis of the CMCR problem and propose a model based on a unique blend of coarsening and integer linear programming (ILP) schemes. This coarsening algorithm is derived from a novel utilization of the Dulmage-Mendelsohn decomposition. Experiments show that the ILP formulation coupled with the Dulmage-Mendelsohn decomposition-based coarsening provides high quality results in practical execution times for reducing the cut size of a given K-way hypergraph partition. © 2014 INFORMS

A fully integrated 24-GHz phased-array transmitter in CMOS

This paper presents the first fully integrated 24-GHz phased-array transmitter designed using 0.18-/spl mu/m CMOS transistors. The four-element array includes four on-chip CMOS power amplifiers, with outputs matched to 50 /spl Omega/, that are each capable of generating up to 14.5 dBm of output power at 24 GHz. The heterodyne transmitter has a two-step quadrature up-conversion architecture with local oscillator (LO) frequencies of 4.8 and 19.2 GHz, which are generated by an on-chip frequency synthesizer. Four-bit LO path phase shifting is implemented in each element at 19.2 GHz, and the transmitter achieves a peak-to-null ratio of 23 dB with raw beam-steering resolution of 7/spl deg/ for radiation normal to the array. The transmitter can support data rates of 500 Mb/s on each channel (with BPSK modulation) and occupies 6.8 mm /spl times/ 2.1 mm of die area

Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review

The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range. Such inversely proportional decline in size and boost in performance consequently demands shrinking of supply voltage and effective power dissipation in chips with millions of transistors. This has triggered substantial amount of research in power reduction techniques into almost every aspect of the chip and particularly the processor cores contained in the chip. This paper presents an overview of techniques for achieving the power efficiency mainly at the processor core level but also visits related domains such as buses and memories. There are various processor parameters and features such as supply voltage, clock frequency, cache and pipelining which can be optimized to reduce the power consumption of the processor. This paper discusses various ways in which these parameters can be optimized. Also, emerging power efficient processor architectures are overviewed and research activities are discussed which should help reader identify how these factors in a processor contribute to power consumption. Some of these concepts have been already established whereas others are still active research areas. © 2009 ACADEMY PUBLISHER

Improved algorithms for link-based non-tree clock networks for skew variability reduction

In the nanometer VLSI technology, the variation effects like manufacturing variation, power supply noise, temperature etc. become very significant. As one of the most vital nets in any synchronous VLSI chip, the Clock Distribution Network (CDN) is especially sensitive to these variations. Recently proposed link-based non-tree [1] addresses this problem by constructing a non-tree that is significantly more tolerant to variations when compared to a clock tree. Although the two algorithms proposed in [1] are effective in reducing the skew variability, they have a few drawbacks including high com-plexity, lengthy links and uneven link distribution across the clock network. In this paper, we propose two new algorithms that can overcome these disadvantages. The effectiveness of the proposed algorithms has been validated using HSPICE based Monte Carlo simulations. Experimental results show that the new algorithms are able to achieve the same or better skew reduction with an average of 5 % wire length increase when compared to the 15 % wire length increase of the existing algorithms in [1]. Moreover, the new algorithms scale extremely well to big clock networks, i.e., the bigger the clock network, the less overall link cost (less than 2 % for the biggest benchmark we have)

The Art of Designing DNA Nanostructures with CAD Software

Since the arrival of DNA nanotechnology nearly 40 years ago, the field has progressed from its beginnings of envisioning rather simple DNA structures having a branched, multi-strand architecture into creating beautifully complex structures comprising hundreds or even thousands of unique strands, with the possibility to exactly control the positions down to the molecular level. While the earliest construction methodologies, such as simple Holliday junctions or tiles, could reasonably be designed on pen and paper in a short amount of time, the advent of complex techniques, such as DNA origami or DNA bricks, require software to reduce the time required and propensity for human error within the design process. Where available, readily accessible design software catalyzes our ability to bring techniques to researchers in diverse fields and it has helped to speed the penetration of methods, such as DNA origami, into a wide range of applications from biomedicine to photonics. Here, we review the historical and current state of CAD software to enable a variety of methods that are fundamental to using structural DNA technology. Beginning with the first tools for predicting sequence-based secondary structure of nucleotides, we trace the development and significance of different software packages to the current state-of-the-art, with a particular focus on programs that are open source

Dynamic Focusing of Large Arrays for Wireless Power Transfer and Beyond

We present architectures, circuits, and algorithms for dynamic 3-D lensing and focusing of electromagnetic power in radiative near- and far-field regions by arrays that can be arbitrary and nonuniform. They can benefit applications such as wireless power transfer at a distance (WPT-AD), volumetric sensing and imaging, high-throughput communications, and optical phased arrays. Theoretical limits on system performance are calculated. An adaptive algorithm focuses the power at the receiver(s) without prior knowledge of its location(s). It uses orthogonal bases to change the phases of multiple elements simultaneously to enhance the dynamic range. One class of such 2-D orthogonal and pseudo-orthogonal masks is constructed using the Hadamard and pseudo-Hadamard matrices. Generation and recovery units (GU and RU) work collaboratively to focus energy quickly and reliably with no need for factory calibration. Orthogonality enables batch processing in high-latency and low-rate communication settings. Secondary vector-based calculations allow instantaneous refocusing at different locations using element-wise calculations. An emulator enables further evaluation of the system. We demonstrate modular WPT-AD GUs of up to 400 elements utilizing arrays of 65-nm CMOS ICs to focus power on RUs that convert the RF power to dc. Each RFIC synthesizes 16 independently phase-controlled RF outputs around 10 GHz from a common single low-frequency reference. Detailed measurements demonstrate the feasibility and effectiveness of RF lensing techniques presented in this article. More than 2 W of dc power can be recovered through a wireless transfer at distances greater than 1 m. The system can dynamically project power at various angles and at distances greater than 10 m. These developments are another step toward unified wireless power, sensing, and communication solutions in the future