20 research outputs found

    Stochastic Memory Devices for Security and Computing

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    With the widespread use of mobile computing and internet of things, secured communication and chip authentication have become extremely important. Hardware-based security concepts generally provide the best performance in terms of a good standard of security, low power consumption, and large-area density. In these concepts, the stochastic properties of nanoscale devices, such as the physical and geometrical variations of the process, are harnessed for true random number generators (TRNGs) and physical unclonable functions (PUFs). Emerging memory devices, such as resistive-switching memory (RRAM), phase-change memory (PCM), and spin-transfer torque magnetic memory (STT-MRAM), rely on a unique combination of physical mechanisms for transport and switching, thus appear to be an ideal source of entropy for TRNGs and PUFs. An overview of stochastic phenomena in memory devices and their use for developing security and computing primitives is provided. First, a broad classification of methods to generate true random numbers via the stochastic properties of nanoscale devices is presented. Then, practical implementations of stochastic TRNGs, such as hardware security and stochastic computing, are shown. Finally, future challenges to stochastic memory development are discussed

    A True Random Number Generator for Probabilistic Computing using Stochastic Magnetic Actuated Random Transducer Devices

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    Magnetic tunnel junctions (MTJs), which are the fundamental building blocks of spintronic devices, have been used to build true random number generators (TRNGs) with different trade-offs between throughput, power, and area requirements. MTJs with high-barrier magnets (HBMs) have been used to generate random bitstreams with \lesssim 200~Mb/s throughput and pJ/bit energy consumption. A high temperature sensitivity, however, adversely affects their performance as a TRNG. Superparamagnetic MTJs employing low-barrier magnets (LBMs) have also been used for TRNG operation. Although LBM-based MTJs can operate at low energy, they suffer from slow dynamics, sensitivity to process variations, and low fabrication yield. In this paper, we model a TRNG based on medium-barrier magnets (MBMs) with perpendicular magnetic anisotropy. The proposed MBM-based TRNG is driven with short voltage pulses to induce ballistic, yet stochastic, magnetization switching. We show that the proposed TRNG can operate at frequencies of about 500~MHz while consuming less than 100~fJ/bit of energy. In the short-pulse ballistic limit, the switching probability of our device shows robustness to variations in temperature and material parameters relative to LBMs and HBMs. Our results suggest that MBM-based MTJs are suitable candidates for building fast and energy-efficient TRNG hardware units for probabilistic computing.Comment: 10 pages, 10 figures, Accepted at ISQED 2023 for poster presentatio

    Random number generation by differential read of stochastic switching in spin-transfer torque memory

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    open8siThe true random number generator (TRNG) is a key enabling technology for cryptography and hardware authentication, which are becoming essential features in the era of the Internet of Things (IoT). Here, we present a novel TRNG concept based on the stochastic switching in spin-transfer torque magnetic random access memory (STT-MRAM). The new methodology relies on the STT-MRAM switching variations affecting the current response under applied rectangular or triangular pulses. Random numbers are extracted from the differential read of the integrated current across two stochastic switching cycles. The proposed concept passes all tests in the NIST SP-800-22 suite with no post-processing, thus supporting STT-MRAM as a promising technology for data/hardware security in the IoT.openCarboni, Roberto; Chen, Wei; Siddik, Manzar; Harms, Jon; Lyle, Andy; Kula, Witold; Sandhu, Gurtej; Ielmini, Daniele*Carboni, Roberto; Chen, Wei; Siddik, Manzar; Harms, Jon; Lyle, Andy; Kula, Witold; Sandhu, Gurtej; Ielmini, Daniel

    Straintronics: A Leap towards Ultimate Energy Efficiency of Magnetic Memory and Logic

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    After decades of exponential growth of the semiconductor industries, predicted by Moore’s Law, the complementary metal-oxide semiconductor (CMOS) circuits are approaching their end of the road, as the feature sizes reach sub-10nm regimes, leaving electrical engineers with a profusion of design challenges in terms of energy limitations and power density. The latter has left the road for alternative technologies wide open to help CMOS overcome the present challenges. Magnetic random access memories (MRAM) are one of the candidates to assist with aforesaid obstacles. Proposed in the early 90’s, MRAM has been under research and development for decades. The expedition for energy efficient MRAM is carried out by the fact that magnetic logic, potentially, has orders of magnitude lower switching energy compared to a charge-based CMOS logic since, in a nanomagnet, magnetic domains would self-align with each other. Regrettably, conventional methods for switching the state of the cell in an MRAM, field induced magnetization switching (FIMS) and spin transfer torque (STT), use electric current (flow of charges) to switch the state of the magnet, nullifying the energy advantage, stated above. In order to maximize the energy efficiency, the amount of charge required to switch the state of the MTJ should be minimized. To this end, straintronics, as an alternative energy efficient method to FIMS and STT to switch the state of a nanomagnet, is proposed recently. The method states that by combining piezoelectricity and inverse magnetostriction, the magnetization state of the device can flip, within few nano-seconds while reducing the switching energy by orders of magnitude compared to STT and FIMS. This research focuses on analysis, design, modeling, and applications of straintronics-based MTJ. The first goal is to perform an in-depth analysis on the static and dynamic behavior of the device. Next, we are aiming to increase the accuracy of the model by including the effect of temperature and thermal noise on the device’s behavior. The goal of performing such analysis is to create a comprehensive model of the device that predicts both static and dynamic responses of the magnetization to applied stress. The model will be used to interface the device with CMOS controllers and switches in large systems. Next, in an attempt to speed up the simulation of such devices in multi-megabyte memory systems, a liberal model has been developed by analytically approximating a solution to the magnetization dynamics, which should be numerically solved otherwise. The liberal model demonstrates more than two orders of magnitude speed improvement compared to the conventional numerical models. Highlighting the applications of the straintronics devices by combining such devices with peripheral CMOS circuitry is another goal of the research. Design of a proof-of-concept 2 kilo-bit nonvolatile straintronics-based memory was introduced in our recent work. To highlight the potential applications of the straintronics device, beyond data storage, the use of the principle in ultra-fast yet low power true random number generation and neuron/synapse design for artificial neural networks have been investigated. Lastly, in an attempt to investigate the practicality of the straintronics principle, the effect of process variations and interface imperfections on the switching behavior of the magnetization is investigated. The results reveal the destructive aftermath of fabrication imperfections on the switching pattern of the device, leaving careful pulse-shaping, alternative topologies, or combination with STT as the last resorts for successful strain-based magnetization switching.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137010/1/barangi_1.pd

    FSO/CV-QKD/QBaudSK system based on 2PolSKBPSK scheme considering dynamical atmospheric conditions

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    EXPERIMENTAL SET-UP Alice uses a laser (λ=1550.1 nm) to generates Coherent States (CS) with diffused phase / Phase Modulator (PM) modifies the optical phase based on a BPSK scheme and a PolM modifies the SOP related to the 2PolSK modulation scheme / The PM and PolM are drives by digital TRNG / After, Alice and Bob use an optical signal of 100nW and 2mW (necessary for reach the Standard Quantum Limit, SQL) / At the Bob’s side, a free space π/2 optical hybrid uses the SOPs of the two optical signals for the simultaneous detection of the conjugate variables of the Weak Coherent State (WCS) due to that performance depends of the degree of polarization (DOP) / Thus, the output electrical current of Balanced Homodyne Detection (BHD) represents the information of the quadrature components of the quantum state transmitted / It is important to mention that the WCS is transmitted through a unidirectional free space channel and the dynamical atmospheric conditions are emulated by an atmosphere turbulence box

    Nano-intrinsic security primitives for internet of everything

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    With the advent of Internet-enabled electronic devices and mobile computer systems, maintaining data security is one of the most important challenges in modern civilization. The innovation of physically unclonable functions (PUFs) shows great potential for enabling low-cost low-power authentication, anti-counterfeiting and beyond on the semiconductor chips. This is because secrets in a PUF are hidden in the randomness of the physical properties of desirably identical devices, making it extremely difficult, if not impossible, to extract them. Hence, the basic idea of PUF is to take advantage of inevitable non-idealities in the physical domain to create a system that can provide an innovative way to secure device identities, sensitive information, and their communications. While the physical variation exists everywhere, various materials, systems, and technologies have been considered as the source of unpredictable physical device variation in large scales for generating security primitives. The purpose of this project is to develop emerging solid-state memory-based security primitives and examine their robustness as well as feasibility. Firstly, the author gives an extensive overview of PUFs. The rationality, classification, and application of PUF are discussed. To objectively compare the quality of PUFs, the author formulates important PUF properties and evaluation metrics. By reviewing previously proposed constructions ranging from conventional standard complementary metal-oxide-semiconductor (CMOS) components to emerging non-volatile memories, the quality of different PUFs classes are discussed and summarized. Through a comparative analysis, emerging non-volatile redox-based resistor memories (ReRAMs) have shown the potential as promising candidates for the next generation of low-cost, low-power, compact in size, and secure PUF. Next, the author presents novel approaches to build a PUF by utilizing concatenated two layers of ReRAM crossbar arrays. Upon concatenate two layers, the nonlinear structure is introduced, and this results in the improved uniformity and the avalanche characteristic of the proposed PUF. A group of cell readout method is employed, and it supports a massive pool of challenge-response pairs of the nonlinear ReRAM-based PUF. The non-linear PUF construction is experimentally assessed using the evaluation metrics, and the quality of randomness is verified using predictive analysis. Last but not least, random telegraph noise (RTN) is studied as a source of entropy for a true random number generation (TRNG). RTN is usually considered a disadvantageous feature in the conventional CMOS designs. However, in combination with appropriate readout scheme, RTN in ReRAM can be used as a novel technique to generate quality random numbers. The proposed differential readout-based design can maintain the quality of output by reducing the effect of the undesired noise from the whole system, while the controlling difficulty of the conventional readout method can be significantly reduced. This is advantageous as the differential readout circuit can embrace the resistance variation features of ReRAMs without extensive pre-calibration. The study in this thesis has the potential to enable the development of cost-efficient and lightweight security primitives that can be integrated into modern computer mobile systems and devices for providing a high level of security

    5G-SRNG: 5G Spectrogram-based Random Number Generation for Devices with Low Entropy Sources

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    Random number generation (RNG) is a crucial element in security protocols, and its performance and reliability are critical for the safety and integrity of digital systems. This is especially true in 5G networks with many devices with low entropy sources. This paper proposes 5G-SRNG, an end-to-end random number generation solution for devices with low entropy sources in 5G networks. Compared to traditional RNG methods, the 5G-SRNG relies on hardware or software random number generators, using 5G spectral information, such as from spectrum-sensing or a spectrum-aware feedback mechanism, as a source of entropy. The proposed algorithm is experimentally verified, and its performance is analysed by simulating a realistic 5G network environment. Results show that 5G-SRNG outperforms existing RNG in all aspects, including randomness, partial correlation and power, making it suitable for 5G network deployments.Comment: 6 Page

    A PUF based Lightweight Hardware Security Architecture for IoT

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    With an increasing number of hand-held electronics, gadgets, and other smart devices, data is present in a large number of platforms, thereby increasing the risk of security, privacy, and safety breach than ever before. Due to the extreme lightweight nature of these devices, commonly referred to as IoT or `Internet of Things\u27, providing any kind of security is prohibitive due to high overhead associated with any traditional and mathematically robust cryptographic techniques. Therefore, researchers have searched for alternative intuitive solutions for such devices. Hardware security, unlike traditional cryptography, can provide unique device-specific security solutions with little overhead, address vulnerability in hardware and, therefore, are attractive in this domain. As Moore\u27s law is almost at its end, different emerging devices are being explored more by researchers as they present opportunities to build better application-specific devices along with their challenges compared to CMOS technology. In this work, we have proposed emerging nanotechnology-based hardware security as a security solution for resource constrained IoT domain. Specifically, we have built two hardware security primitives i.e. physical unclonable function (PUF) and true random number generator (TRNG) and used these components as part of a security protocol proposed in this work as well. Both PUF and TRNG are built from metal-oxide memristors, an emerging nanoscale device and are generally lightweight compared to their CMOS counterparts in terms of area, power, and delay. Design challenges associated with designing these hardware security primitives and with memristive devices are properly addressed. Finally, a complete security protocol is proposed where all of these different pieces come together to provide a practical, robust, and device-specific security for resource-limited IoT systems

    Low Power Memory/Memristor Devices and Systems

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    This reprint focusses on achieving low-power computation using memristive devices. The topic was designed as a convenient reference point: it contains a mix of techniques starting from the fundamental manufacturing of memristive devices all the way to applications such as physically unclonable functions, and also covers perspectives on, e.g., in-memory computing, which is inextricably linked with emerging memory devices such as memristors. Finally, the reprint contains a few articles representing how other communities (from typical CMOS design to photonics) are fighting on their own fronts in the quest towards low-power computation, as a comparison with the memristor literature. We hope that readers will enjoy discovering the articles within
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