13 research outputs found

    High radix parallel architecture for GF(p) elliptic curve processor

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    A new GF(p) cryptographic processor architecture for elliptic curve encryption/decryption is proposed in this paper. The architecture takes advantage of projective coordinates to convert GF(p) inversion needed in elliptic point operations into several multiplication steps. Unlike existing sequential designs, we show that projecting into (X/Z,Y/Z) leads to a much better performance than the conventional choice of projecting into the current (X/Z/sup 2/,Y/Z/sup 3/). We also propose to use high radix modulo multipliers which give a wide range of area-time trade-offs. The proposed architecture is a significant challenger for implementing data security systems based on elliptic curve cryptography

    High Radix Parallel Architecture For GF(p) Elliptic Curve Processor

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    A new GF(p) cryptographic processor architecture for elliptic curve encryption/decryption is proposed in this paper. The architecture takes advantage of projective coordinates to convert GF(p) inversion needed in elliptic point operations into several multiplication steps. Unlike existing sequential designs, we show that projecting into (X/Z,Y/Z) leads to a much better improved performance than conventional choice of projecting into the current (X/Z^2,Y/Z^3). We also propose to use high radix modulo multipliers which give a wide range of area-time trade-offs. The proposed architecture is a significant challenger for implementing data security systems based on elliptic curve cryptography

    High Radix Parallel Architecture For GF(p) Elliptic Curve Processor

    Get PDF
    A new GF(p) cryptographic processor architecture for elliptic curve encryption/decryption is proposed in this paper. The architecture takes advantage of projective coordinates to convert GF(p) inversion needed in elliptic point operations into several multiplication steps. Unlike existing sequential designs, we show that projecting into (X/Z,Y/Z) leads to a much better improved performance than conventional choice of projecting into the current (X/Z^2,Y/Z^3). We also propose to use high radix modulo multipliers which give a wide range of area-time trade-offs. The proposed architecture is a significant challenger for implementing data security systems based on elliptic curve cryptography

    Applying Hessian Curves in Parallel to Improve Elliptic Curve Scalar Multiplication Hardware

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    As a public key cryptography, Elliptic Curve Cryptography (ECC) is well known to be the most secure algorithms that can be used to protect information during the transmission. ECC in its arithmetic computations suffers from modular inversion operation. Modular Inversion is a main arithmetic and very long-time operation that performed by the ECC crypto-processor. The use of projective coordinates to define the Elliptic Curves (EC) instead of affine coordinates replaced the inversion operations by several multiplication operations. Many types of projective coordinates have been proposed for the elliptic curve E: y2 = x3 + ax + b which is defined over a Galois field GF(p) to do EC arithmetic operations where it was found that these several multiplications can be implemented in some parallel fashion to obtain higher performance. In this work, we will study Hessian projective coordinates systems over GF (p) to perform ECC doubling operation by using parallel multipliers to obtain maximum parallelism to achieve maximum gain

    Parallelizing GF(P) Elliptic Curve Cryptography Computations for Security and Speed

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    The elliptic curve cryptography can be observed as two levels of computations, upper scalar multiplication level and lower point operations level. We combine the inherited parallelism in both levels to reduce the delay and improve security against the simple power attack. The best security and speed performance is achieved when parallelizing the computation to eight parallel multiplication operations. This strategy is worth considering since it shows very attractive performance conclusions

    Parallelizing GF(P) Elliptic Curve Cryptography Computations for Security and Speed

    Get PDF
    The elliptic curve cryptography can be observed as two levels of computations, upper scalar multiplication level and lower point operations level. We combine the inherited parallelism in both levels to reduce the delay and improve security against the simple power attack. The best security and speed performance is achieved when parallelizing the computation to eight parallel multiplication operations. This strategy is worth considering since it shows very attractive performance conclusions

    Pipelining GF(P) Elliptic Curve Cryptography Computation

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    This paper proposes a new method to compute Elliptic Curve Cryptography in Galois Fields GF(p). The method incorporates pipelining to utilize the benefit of both parallel and serial methodology used before. It allows the exploitation of the inherited independency that exists in elliptic curve point addition and doubling operations. The results showed attraction because of its improvement over many parallel and serial techniques of elliptic curve crypto-computations

    Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers

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    In this paper, a fast hardware architecture for elliptic curve cryptography computation in Galois Field GF(p) is proposed. The architecture is implemented for 160-bits, as its data size to handle. The design adopts projective coordinates to eliminate most of the required GF(p) inversion calculations replacing them with several multiplication operations. The hardware is intended to be scalable, which allows the hardware to compute long precision numbers in a repetitive way. The design involves four parallel scalable multipliers to gain the best speed. This scalable design was implemented in different versions depending on the area and speed. All scalable implementations were compared with an available FPGA design. The proposed scalable hardware showed interesting results in both area and speed. It also showed some area-time flexibility to accommodate the variation needed by different crypto applications

    Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers

    Get PDF
    In this paper, a fast hardware architecture for elliptic curve cryptography computation in Galois Field GF(p) is proposed. The architecture is implemented for 160-bits, as its data size to handle. The design adopts projective coordinates to eliminate most of the required GF(p) inversion calculations replacing them with several multiplication operations. The hardware is intended to be scalable, which allows the hardware to compute long precision numbers in a repetitive way. The design involves four parallel scalable multipliers to gain the best speed. This scalable design was implemented in different versions depending on the area and speed. All scalable implementations were compared with an available FPGA design. The proposed scalable hardware showed interesting results in both area and speed. It also showed some area-time flexibility to accommodate the variation needed by different crypto applications

    Merging GF(p) Elliptic Curve Point Adding and Doubling on Pipelined VLSI Cryptographic ASIC Architecture

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    This paper merges between elliptic curve addition presents a modified processor architecture for Elliptic Curve Cryptography computations in Galois Fields GF(p). The architecture incorporates the methodology of pipelining to utilize the benefit of both parallel and serial implementations. It allows the exploitation of the inherited independency that exists in elliptic curve point addition and doubling operations using a single pipelined core. The processor architecture showed attraction because of its improvement over many parallel and serial implementations of elliptic curve crypto-systems. It proved to be efficient having better performance with regard to area, speed, and power consumption
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