High Performance, Point-to-Point, Transmission Line Signaling

Inter-chip signaling latency and bandwidth can be key factors limiting the performance of large VLSI systems. We present a high performance, transmission line signaling scheme for point-to-point communications between VLSI components. In particular, we detail circuitry which allows a pad driver to sense the voltage level on the attached pad during signaling and adjust the drive impedance to match the external transmission line impedance. This allows clean, reflection-free signaling despite the wide range of variations common in IC device processing and interconnect fabrication. Further, we show how similar techniques can be used to adjust the arrival time of signals to allow high signaling bandwidth despite variations in interconnect delays. This scheme employed for high performance signaling is a specific embodiment of a more general technique. Conventional electronic systems must accommodate a range of system characteristics (e.g. delay, voltage, impedance). As a result, circuit designers traditionally build large operating margins into their circuits to guarantee proper operation across all possible ranges of these characteristics. These margins are generally added at the expense of performance. The alternative scheme exemplified here is to sample these system characteristics in the device\u27s final operating environment and use this feedback to tune system operation around the observed characteristics. This tuning operation reduces the range of characteristics the system must accommodate, allowing increased performance. We briefly contrast this sampled, system-level feedback with the more conventional, fine-grained feedback employed on ICs (e.g. PLLs)

High-performance long NoC link using delay-insensitive current-mode signaling

High-performance long-range NoC link enables efficient implementation of network-on-chip topologies which inherently require high-performance long-distance point-to-point communication such as torus and fat-tree structures. In addition, the performance of other topologies, such as mesh, can be improved by using high-performance link between few selected remote nodes.We presented novel implementation of high-performance long-range NoC link based onmultilevel current-mode signaling and delayinsensitive two-phase 1-of-4 encoding. Current-mode signaling reduces the communication latency of long wires significantlycompared to voltage-mode signaling, making it possible to achieve high throughput without pipelining and/or using repeaters. The performance of the proposed multilevel current-mode interconnect is analyzed and compared with two reference voltage mode interconnects. These two reference interconnects are designed using two-phase 1-of-4 encoded voltage-mode signaling, one with pipeline stages and the other using optimal repeater insertion. The proposed multilevel current-mode interconnect achieves higher throughput and lower latency than the two reference interconnects. Its throughput at 8mm wire length is 1.222GWord/swhich is 1.58 and 1.89 times higher than the pipelined and optimal repeater insertion interconnects, respectively. Furthermore, its power consumption is less than the optimal repeater insertion voltage-mode interconnect, at 10mm wire length its power consumption is 0.75mW while the reference repeater insertion interconnect is 1.066 mW. The effect of crosstalk is analyzed using four-bit parallel data transfer with the best-case and worst-case switching patterns and a transmission line model which has both capacitive coupling and inductive coupling.</p

56+ Gb/s serial transmission using duo-binary signaling

In this paper we present duobinary signaling as an alternative for signaling schemes like PAM4 and Ensemble NRZ that are currently being considered as ways to achieve data rates of 56 Gb/s over copper. At the system level, the design includes a custom transceiver ASIC. The transmitter is capable of equalizing 56 Gb/s non-return to zero (NRZ) signals into a duobinary response at the output of the channel. The receiver includes dedicated hardware to decode the duobinary signal. This transceiver is used to demonstrate error-free transmission for different PCB channel lengths including a state-of-the-art Megtron 6 backplane demonstrator

Performance of Modal Signaling vs. medium dielectric variability

This paper addresses the feasibility of the so-called Modal Signaling (MS) transmission scheme from a stochastic viewpoint. MS has been proposed for crosstalk mitigation over interconnects and is based on the encoding of signals onto fundamental transmission-line modes. However, the design of drivers and receivers strongly depends on the physical characteristics of the channel. In this paper, the impact of random variations of these properties on MS effectiveness is efficiently analyzed by means of Polynomial Chaos (PC) techniqu

DAC-Less amplifier-less generation and transmission of QAM signals using sub-volt silicon-organic hybrid modulators

We demonstrate generation and transmission of optical signals by directly interfacing highly efficient silicon-organic hybrid (SOH) modulators to binary output ports of a field-programmable gate array. Using an SOH Mach-Zehnder modulator (MZM) and an SOH IQ modulator we generate ON-OFF- keying and binary phase-shift keying signals as well as quadrature phase-shift keying and 16-state quadrature amplitude modulation (16QAM) formats. Peak-to-peak voltages amount to only 0.27 V-pp for driving the MZM and 0.41 V-pp for the IQ modulator. Neither digital-to-analog converters nor drive amplifiers are required, and the RF energy consumption in the modulator amounts to record-low 18 fJ/bit for 16QAM signaling