3 research outputs found
Hardware Implementation of the GPS authentication
In this paper, we explore new area/throughput trade- offs for the Girault,
Poupard and Stern authentication protocol (GPS). This authentication protocol
was selected in the NESSIE competition and is even part of the standard ISO/IEC
9798. The originality of our work comes from the fact that we exploit a fixed
key to increase the throughput. It leads us to implement GPS using the Chapman
constant multiplier. This parallel implementation is 40 times faster but 10
times bigger than the reference serial one. We propose to serialize this
multiplier to reduce its area at the cost of lower throughput. Our hybrid
Chapman's multiplier is 8 times faster but only twice bigger than the
reference. Results presented here allow designers to adapt the performance of
GPS authentication to their hardware resources. The complete GPS prover side is
also integrated in the network stack of the PowWow sensor which contains an
Actel IGLOO AGL250 FPGA as a proof of concept.Comment: ReConFig - International Conference on ReConFigurable Computing and
FPGAs (2012
COMPILATION D'APPLICATIONS FLOT DE DONNÉES PARAMÉTRIQUES POUR MPSOC DÉDIÉS À LA RADIO LOGICIELLE
The emergence of software-defined radio follows the rapidly evolving telecommunicationdomain. The requirements in both performance and dynamicity has engendered softwaredefined-radio-dedicated MPSoCs. Specialization of these MPSoCs make them difficult toprogram and verify. Dataflow models of computation have been suggested as a way to mitigatethis complexity. Moreover, the need for flexible yet verifiable models has led to thedevelopment of new parametric dataflow models.In this thesis, I study the compilation of parametric dataflow applications targetingsoftware-defined-radio platforms. After a hardware and software state of the art in this field, Ipropose a new refinement of dataflow scheduling, and outline its application to buffer size’sverification. Then, I introduce a new high-level format to define dataflow actors and graph,with the associated compilation flow. I apply these concepts to optimised code generation fortheMagali software-defined-radio platform. Compilation of parts of the LTE protocol are usedto evaluate the performances of the proposed compilation flow.Le développement de la radio logicielle fait suite à l’évolution rapide du domaine destélécommunications. Les besoins en performance et en dynamicité ont donné naissance à desMPSoC dédiés à la radio logicielle. La spécialisation de cesMPSoC rend cependant leur programmationet leur vérification complexes. Des travaux proposent d’atténuer cette complexitépar l’utilisation de paradigmes tels que lemodèle de calcul flot de données. Parallèlement, lebesoin demodèles flexibles et vérifiables a mené au développement de nouveaux modèlesflot de données paramétriques.Dans cette thèse, j’étudie la compilation d’applications utilisant un modèle de calcul flotde données paramétrique et ciblant des plateformes de radio logicielle. Après un état de l’artdu matériel et logiciel du domaine, je propose un raffinement de l’ordonnancement flot dedonnées, et présente son application à la vérification des taillesmémoires. Ensuite, j’introduisun nouveau format de haut niveau pour définir le graphe et les acteurs flot de données, ainsique le flot de compilation associé. J’applique ces concepts à la génération de code optimisépour la plateforme de radio logicielle Magali. La compilation de parties du protocole LTEpermet d’évaluer les performances du flot de compilation proposé