The design and multiplier-less realization of software radio receivers with reduced system delay

This paper studies the design and multiplier-less realization of a new software radio receiver (SRR) with reduced system delay. It employs low-delay finite-impulse response (FIR) and digital allpass filters to effectively reduce the system delay of the multistage decimators in SRRs. The optimal least-square and minimax designs of these low-delay FIR and allpass-based filters are formulated as a semidefinite programming (SDP) problem, which allows zero magnitude constraint at ω = π to be incorporated readily as additional linear matrix inequalities (LMIs). By implementing the sampling rate converter (SRC) using a variable digital filter (VDF) immediately after the integer decimators, the needs for an expensive programmable FIR filter in the traditional SRR is avoided. A new method for the optimal minimax design of this VDF-based SRC using SDP is also proposed and compared with traditional weight least squares method. Other implementation issues including the multiplier-less and digital signal processor (DSP) realizations of the SRR and the generation of the clock signal in the SRC are also studied. Design results show that the system delay and implementation complexities (especially in terms of high-speed variable multipliers) of the proposed architecture are considerably reduced as compared with conventional approaches. © 2004 IEEE.published_or_final_versio

Power-Efficient Time-Domain Dispersion Compensation Using Optimized FIR Filter Implementation

We investigate fixed-point aspects and time-domain ASIC implementations of CD compensation. An optimized implementation gives significant power dissipation reduction for short links, with further reduction if pulse shaping is considered

New iterative framework for frequency response mismatch correction in time-interleaved ADCs: Design and performance analysis

This paper proposes a new iterative framework for the correction of frequency response mismatch in time-interleaved analog-to-digital converters. Based on a general time-varying linear system model for the mismatch, we treat the reconstruction problem as a linear inverse problem and establish a flexible iterative framework for practical implementation. It encumbrances a number of efficient iterative correction algorithms and simplifies their design, implementation, and performance analysis. In particular, an efficient Gauss-Seidel iteration is studied in detail to illustrate how the correction problem can be solved iteratively and how the proposed structure can be efficiently implemented using Farrow-based variable digital filters with few general-purpose multipliers. We also study important issues, such as the sufficient convergence condition and reconstructed signal spectrum, derive new lower bound of signal-to-distortion-and-noise ratio in order to ensure stable operation, and predict the performance of the proposed structure. Furthermore, we propose an extended iterative structure, which is able to cope with systems involving more than one type of mismatches. Finally, the theoretical results and the effectiveness of the proposed approach are validated by means of computer simulations. © 2011 IEEE.published_or_final_versio

A versatile iterative framework for the reconstruction of bandlimited signals from their nonuniform samples

In this paper, we study a versatile iterative framework for the reconstruction of uniform samples from nonuniform samples of bandlimited signals. Assuming the input signal is slightly oversampled, we first show that its uniform and nonuniform samples in the frequency band of interest can be expressed as a system of linear equations using fractional delay digital filters. Then we develop an iterative framework, which enables the development and convergence analysis of efficient iterative reconstruction algorithms. In particular, we study the Richardson iteration in detail to illustrate how the reconstruction problem can be solved iteratively, and show that the iterative method can be efficiently implemented using Farrow-based variable digital filters with few general-purpose multipliers. Under the proposed framework, we also present a completed and systematic convergence analysis to determine the convergence conditions. Simulation results show that the iterative method converges more rapidly and closer to the true solution (i.e. the uniform samples) than conventional iterative methods using truncation of sinc series. © 2010 The Author(s).published_or_final_versionSpringer Open Choice, 21 Feb 201

Low Complexity Multiplier-less Modified FRM Filter Bank using MPGBP Algorithm

The design of a low complexity multiplier-less narrow transition band filter bank for the channelizer of multi-standard software-defined radio (SDR) is investigated in this paper. To accomplish this, the modal filter and complementary filter in the upper and lower branches of the conventional Frequency Response Masking (FRM) architecture are replaced with two power-complementary and linear phase filter banks. Secondly, a new masking strategy is proposed to fully exploit the potential of the numerous spectra replicas produced by the interpolation of the modal filter, which was previously ignored in the existing FRM design. In this scheme, the two masking filters are appropriately modulated and alternately masked over the spectra replicas from 0 to 2$\pi$, to generate even and odd channels. This Alternate Masking Scheme (AMS) increases the potency of the Modified FRM (ModFRM) architecture for the design of a computationally efficient narrow transition band uniform filter bank (termed as ModFRM-FB). Finally, by combining the adjoining ModFRM-FB channels, Non-Uniform ModFRM-FB (NUModFRM-FB) for extracting different communication standards in the SDR channelizer is created. To reduce the total power consumption of the architecture, the coefficients of the proposed system are made multiplier-less using the Matching Pursuits Generalized Bit-Planes (MPGBP) algorithm. In this method, filter coefficients are successively approximated using a dictionary of vectors to give a sum-of-power-of-two (SOPOT) representation. In comparison to all other general optimization techniques, such as genetic algorithms, the suggested design method stands out for its ease of implementation, requiring no sophisticated optimization or exhaustive search schemes. Another notable feature of the suggested approach is that, in comparison to existing methods, the design time for approximation has been greatly reduced. To further bring down the complexity, adders are reused in recurrent SOPOT terms using the Common Sub-expression Elimination (CSE) technique without compromising the filter performance

Revisiting Multi-Step Nonlinearity Compensation with Machine Learning

For the efficient compensation of fiber nonlinearity, one of the guiding principles appears to be: fewer steps are better and more efficient. We challenge this assumption and show that carefully designed multi-step approaches can lead to better performance-complexity trade-offs than their few-step counterparts.Comment: 4 pages, 3 figures, This is a preprint of a paper submitted to the 2019 European Conference on Optical Communicatio

On the design and implementation of FIR and IIR digital filters with variable frequency characteristics

This paper studies the design and implementation of finite-impulse response (FIR) and infinite-impulse response (IIR) variable digital filters (VDFs), whose frequency characteristics can be controlled continuously by some control or tuning parameters. A least squares (LS) approach is proposed for the design of FIR VDFs by expressing the impulse response of the filter as a linear combination of basis functions. It is shown that the optimal LS solution can be obtained by solving a system of linear equations. By choosing the basis functions as piecewise polynomials, VDFs with larger tuning range than that of ordinary polynomial based approach results. The proposed VDF can be efficiently implemented using the familiar Farrow structure. Making use of the FIR VDF so obtained, an Eigensystem Realization Algorithm (ERA)-based model reduction technique is proposed to approximate the FIR VDF by a stable IIR VDF with lower system order. The advantages of the model reduction approach are: 1) it is computational simple which only requires the computation of the singular value decomposition of a Hankel matrix; 2) the IIR VDF obtained is guaranteed to be stable; and 3) the frequency response such as the phase response of the FIR prototype is well preserved. Apart from the above advantages, the proposed IIR VDF does not suffer from undesirable transient response during parameter tuning found in other approaches based on direct tuning of filter parameters. For frequency selective VDFs, about 40% of the multiplications can be saved using the IIR VDFs. The implementation of the proposed FIR VDF using sum-of-powers-of-two (SOPOT) coefficient and the multiplier block (MB) technique are also studied. Results show that about two-third of the additions in implementing the multiplication of the SOPOT coefficients can be saved using the multiplier block, which leads to significant savings in hardware complexity.link_to_subscribed_fulltex

Efficient Multi-Standard Software Defined Radio receivers implementation using Frequency response masking Naveena P and Nithya S

The compatibility of the filter bank with different communication standards requires dynamic reconfigurability. The polyphase channelizer has the advantage that the channel filter can be adjusted to better approximate the ideal magnitude response.Hanning Window functions can also be used to improve the side lobe response without any of the performance penalties associated with the FFT channelizer. The proposed FB offers reconfigurability at the architectural level and at the channel filter level and is capable of extracting channels of nonuniform bandwidths corresponding to multiple wireless communication standard from the digitized wideband input signal