Control Strategies for Open-End Winding Drives Operating in the Flux-Weakening Region

This paper presents and compares control strategies for three-phase open-end winding drives operating in the flux-weakening region. A six-leg inverter with a single dc-link is associated with the machine in order to use a single energy source. With this topology, the zero-sequence circuit has to be considered since the zero-sequence current can circulate in the windings. Therefore, conventional over-modulation strategies are not appropriate when the machine enters in the flux-weakening region. A few solutions dealing with the zero-sequence circuit have been proposed in literature. They use a modified space vector modulation or a conventional modulation with additional voltage limitations. The paper describes the aforementioned strategies and then a new strategy is proposed. This new strategy takes into account the magnitudes and phase angles of the voltage harmonic components. This yields better voltage utilization in the dq frame. Furthermore, inverter saturation is avoided in the zero-sequence frame and therefore zero-sequence current control is maintained. Three methods are implemented on a test bed composed of a three-phase permanent-magnet synchronous machine, a six-leg inverter and a hybrid DSP/FPGA controller. Experimental results are presented and compared for all strategies. A performance analysis is conducted as regards the region of operation and the machine parameters.Projet SOFRACI/FU

A multi-port current-limiting hybrid DC crcuit breaker

Recently the hybrid multi-port DC circuit breaker (MP-DCCB) is becoming popular in protecting HVDC grids, thanks to their re-duction of power electronics devices. In this paper, an enhanced multi-port current-limiting DCCB (MP-CLCB) for multiple line protection is proposed. The integrated fault current limiter (FCL) inside the MP-CLCB can clear the fault faster with slightly in-creased costs. To reduce the energy dissipation requirement for the surge arresters caused by the newly added current-limiting path, an energy transfer path which provides a loop with the in-ductors during the current decay stage is designed. The theoreti-cal analysis of the pre-charging, current-limiting, fault interrup-tion and energy dissipation of the MP-CLCB is carried out. Moreover, the design principles of the energy dissipation and the key parameters of the MP-CLCB are provided. The proposed approaches are verified through simulations in PSCAD/EMTDC. The results show that the MP-CLCB can replace multiple DCCBs, accelerate the fault current interruption and reduce the energy dissipation requirement for the surge arresters

A realistic early-stage power grid verification algorithm based on hierarchical constraints

Power grid verification has become an indispensable step to guarantee a functional and robust chip design. Vectorless power grid verification methods, by solving linear programming (LP) problems under current constraints, enable worst-case voltage drop predictions at an early stage of design when the specific waveforms of current drains are unknown. In this paper, a novel power grid verification algorithm based on hierarchical constraints is proposed. By introducing novel power constraints, the proposed algorithm generates more realistic current patterns and provides less pessimistic voltage drop predictions. The model order reduction-based coefficient computation algorithm reduces the complexity of formulating the LP problems from being proportional to steps to being independent of steps. Utilizing the special hierarchical constraint structure, the submodular polyhedron greedy algorithm dramatically reduces the complexity of solving the LP problems from over O(k 3 m) to roughly O(k k m), where k m is the number of variables. Numerical results have shown that the proposed algorithm provides less pessimistic voltage drop prediction while at the same time achieves dramatic speedup. © 2011 IEEE.published_or_final_versio

Quantitative criteria of considering AC infeed in DC fault assessment of modular multilevel converters

International audienceAn accurate and efficient DC fault current assessment of modular multilevel converters (MMCs) is critical for designs and protection. The state-of-the-art often ignores the impact of the AC infeed in the DC fault assessment without MMC blocking. However, whether the AC infeed needs to be considered or not is a controversial problem. This paper proposes quantitative criteria to determine the necessity of considering the AC infeed in the fault current assessment. The method is based on the premise that the MMC blocking has not occurred. Based on the average model of the MMC, the fault current contribution from the AC side is quantified under different control schemes. The criteria are established by a contributing ratio of the AC infeed over the total fault current. The obtained criteria only rely on the system and control parameters, which enable designers to identify the impact by ignoring the AC infeed in the DC fault assessment. The effectiveness of the proposed criteria is validated by two case studies and two different control schemes. The results reveal that the submodule (SM) capacitance and the number of SMs have a large impact on the AC infeed contribution

AC voltage regulation of a bidirectional high-frequency link converter using a deadbeat controller

This paper presents a digital controller for AC voltage regulation of a bidirectional high-frequency link (BHFL) inverter using Deadbeat control. The proposed controller consists of inner current loop, outer voltage loop and a feed-forward controller, which imposes a gain scheduling effect according to the reference signal to compensate the steady-state error of the system. The main property of the proposed controller is that the current- and the voltage-loop controllers have the same structure, and use the same sampling period. This simplifies the design and implementation processes. To improve the overall performance of the system, additional disturbance decoupling networks are employed. This takes into account the model discretization effect. Therefore, accurate disturbance decoupling can be achieved, and the system robustness towards load variations is increased. To avoid transformer saturation due to low frequency voltage envelopes, an equalized pulse width modulation (PWM) technique has been introduced. The proposed controller has been realized using the DS1104 digital signal processor (DSP) from dSPACE. Its performances have been tested on a one kVA prototype inverter. Experimental results showed that the proposed controller has very fast dynamic and good steady-state responses even under highly nonlinear loads

Application of Modular Multilevel Converter technology to HV power supplies of Neutral Beam injector

Evaluation of the possible application of Modular Multilevel Converter at the AGPS of NBI