6,485 research outputs found

    The STAR MAPS-based PiXeL detector

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    The PiXeL detector (PXL) for the Heavy Flavor Tracker (HFT) of the STAR experiment at RHIC is the first application of the state-of-the-art thin Monolithic Active Pixel Sensors (MAPS) technology in a collider environment. Custom built pixel sensors, their readout electronics and the detector mechanical structure are described in detail. Selected detector design aspects and production steps are presented. The detector operations during the three years of data taking (2014-2016) and the overall performance exceeding the design specifications are discussed in the conclusive sections of this paper

    A survey of scan-capture power reduction techniques

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    With the advent of sub-nanometer geometries, integrated circuits (ICs) are required to be checked for newer defects. While scan-based architectures help detect these defects using newer fault models, test data inflation happens, increasing test time and test cost. An automatic test pattern generator (ATPG) exercise’s multiple fault sites simultaneously to reduce test data which causes elevated switching activity during the capture cycle. The switching activity results in an IR drop exceeding the devices under test (DUT) specification. An increase in IR-drop leads to failure of the patterns and may cause good DUTs to fail the test. The problem is severe during at-speed scan testing, which uses a functional rated clock with a high frequency for the capture operation. Researchers have proposed several techniques to reduce capture power. They used various methods, including the reduction of switching activity. This paper reviews the recently proposed techniques. The principle, algorithm, and architecture used in them are discussed, along with key advantages and limitations. In addition, it provides a classification of the techniques based on the method used and its application. The goal is to present a survey of the techniques and prepare a platform for future development in capture power reduction during scan testing

    Dynamics of Perceptual Organization in Complex Visual Search: The Identification of Self Organized Criticality with Respect to Visual Grouping Principles

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    The current project applies modern quantitative theories of visual perception to examine the effect of the Gestalt Law of proximity on visual cognition. Gestalt Laws are spontaneous dynamic processes (Brunswik & Kamiya, 1953; Wertheimer, 1938) that underlie the principles of perceptual organization. These principles serve as mental short-cuts, heuristic rule-of-thumb strategies that shorten decision-making time and allow continuous, efficient processing and flow of information (Hertwig & Todd, 2002). The proximity heuristic refers to the observation that objects near each other in the visual field tend to be grouped together by the perceptual system (Smith-Gratto & Fisher, 1999). Proximity can be directly quantified as the distance between adjacent objects (inter-object distances) in a visual array. Recent studies on eye movements have revealed the interactive nature of self organizing dynamic processes in visual cognition (Aks, Zelinsky, & Sprott, 2002; Stephen, & Mirman, 2010). Research by Aks and colleagues (2002) recorded eye-movements during a complex visual search task in which participants searched for a target among distracters. Their key finding was that visual search patterns are not randomly distributed, and that a simple form of temporal memory exists across the sequence of eye movements. The objective of the present research was to identify how the law of proximity impacts visual search behavior as reflected in eye movement patterns. We discovered that 1) eye movements are fractal; 2) more fractality will result in decreased reaction time during visual search, and 3) fractality facilitates the improvement of reaction times over blocks of trials. Results were interpreted in view of theories of cognitive resource allocation and perceptual efficiency. The current research could inspire potential innovations in computer vision, user interface design and visual cognition

    Access Time Minimization in IEEE 1687 Networks

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    IEEE 1687 enables flexible access to the embedded (on-chip) instruments that are needed for post-silicon validation, debugging, wafer sort, package test, burn-in, printed circuit board bring-up, printed circuit board assembly manufacturing test, power-on self-test, and in-field test. At any of these scenarios, the instruments are accessed differently, and at a given scenario the instruments are accessed differently over time. It means the IEEE 1687 network needs to be frequently reconfigured from accessing one set of instruments to accessing a different set of instruments. Due to the need of frequent reconfiguration of the IEEE 1687 network it is important to (1) minimize the run-time for the algorithm finding the new reconfiguration, and (2) generate scan vectors with minimized access time. In this paper we model the reconfiguration problem using Boolean Satisfiability Problem (SAT). Compared to previous works we show significant reduction in run-time and we ensure minimal access time for the generated scan vectors

    Spatial Augmented Reality Using Structured Light Illumination

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    Spatial augmented reality is a particular kind of augmented reality technique that uses projector to blend the real objects with virtual contents. Coincidentally, as a means of 3D shape measurement, structured light illumination makes use of projector as part of its system as well. It uses the projector to generate important clues to establish the correspondence between the 2D image coordinate system and the 3D world coordinate system. So it is appealing to build a system that can carry out the functionalities of both spatial augmented reality and structured light illumination. In this dissertation, we present all the hardware platforms we developed and their related applications in spatial augmented reality and structured light illumination. Firstly, it is a dual-projector structured light 3D scanning system that has two synchronized projectors operate simultaneously, consequently it outperforms the traditional structured light 3D scanning system which only include one projector in terms of the quality of 3D reconstructions. Secondly, we introduce a modified dual-projector structured light 3D scanning system aiming at detecting and solving the multi-path interference. Thirdly, we propose an augmented reality face paint system which detects human face in a scene and paints the face with any favorite colors by projection. Additionally, the system incorporates a second camera to realize the 3D space position tracking by exploiting the principle of structured light illumination. At last, a structured light 3D scanning system with its own built-in machine vision camera is presented as the future work. So far the standalone camera has been completed from the a bare CMOS sensor. With this customized camera, we can achieve high dynamic range imaging and better synchronization between the camera and projector. But the full-blown system that includes HDMI transmitter, structured light pattern generator and synchronization logic has yet to be done due to the lack of a well designed high speed PCB

    Technology assisted screening and balance training systems for stroke patients

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    by Deepesh KumarPh.D

    On the Interoperability of Programming Languages based on the Fork-Join Parallelism Model

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    This thesis describes the implementation of MetaFork, a meta-language for concurrency platforms targeting multicore architectures. First of all, MetaFork is a multithreaded language based on the fork-join model of concurrency: it allows the programmer to express parallel algorithms assuming that tasks are dynamically scheduled at run-time. While MetaFork makes no assumption about the run-time system, it formally defines the serial C-elision of a MetaFork program. In addition, MetaFork is a suite of source-to-source compilers permitting the automatic translation of multithreaded programs between programming languages based on the fork-join model. Currently, this compilation framework supports the OpenMP and CilkPlus concurrency platforms. The implementation of those compilers explicitly manages parallelism according to the directives specified in MetaFork, OpenMP and CilkPlus. We evaluate experimentally the benefits of MetaFork. First, we show that this framework can be used to perform comparative implementation of a given multi- threaded algorithm so as to narrow performance bottlenecks in one implementation of this algorithm. Secondly, we show that the translation of hand written and highly optimized code within MetaFork generally produces code with similar performance as the original
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