Parametric macromodeling of lossy and dispersive multiconductor transmission lines

We propose an innovative parametric macromodeling technique for lossy and dispersive multiconductor transmission lines (MTLs) that can be used for interconnect modeling. It is based on a recently developed method for the analysis of lossy and dispersive MTLs extended by using the multivariate orthonormal vector fitting (MOVF) technique to build parametric macromodels in a rational form. They take into account design parameters, such as geometrical layout or substrate features, in addition to frequency. The presented technique is suited to generate state-space models and synthesize equivalent circuits, which can be easily embedded into conventional SPICE-like solvers. Parametric macromodels allow to perform design space exploration, design optimization, and sensitivity analysis efficiently. Numerical examples validate the proposed approach in both frequency and time domain

Passivity-preserving parameterized model order reduction using singular values and matrix interpolation

We present a parameterized model order reduction method based on singular values and matrix interpolation. First, a fast technique using grammians is utilized to estimate the reduced order, and then common projection matrices are used to build parameterized reduced order models (ROMs). The design space is divided into cells, and a Krylov subspace is computed for each cell vertex model. The truncation of the singular values of the merged Krylov subspaces from the models located at the vertices of each cell yields a common projection matrix per design space cell. Finally, the reduced system matrices are interpolated using positive interpolation schemes to obtain a guaranteed passive parameterized ROM. Pertinent numerical results validate the proposed technique

Guaranteed passive parameterized model order reduction of the partial element equivalent circuit (PEEC) method

The decrease of IC feature size and the increase of operating frequencies require 3-D electromagnetic methods, such as the partial element equivalent circuit (PEEC) method, for the analysis and design of high-speed circuits. Very large systems of equations are often produced by 3-D electromagnetic methods. During the circuit synthesis of large-scale digital or analog applications, it is important to predict the response of the system under study as a function of design parameters, such as geometrical and substrate features, in addition to frequency (or time). Parameterized model order reduction (PMOR) methods become necessary to reduce large systems of equations with respect to frequency and other design parameters. We propose an innovative PMOR technique applicable to PEEC analysis, which combines traditional passivity-preserving model order reduction methods and positive interpolation schemes. It is able to provide parametric reduced-order models, stable, and passive by construction over a user-defined range of design parameter values. Numerical examples validate the proposed approach

Addressing Computational Complexity of High Speed Distributed Circuits Using Model Order Reduction

Advanced in the fabrication technology of integrated circuits (ICs) over the last couple of years has resulted in an unparalleled expansion of the functionality of microelectronic systems. Today’s ICs feature complex deep-submicron mixed-signal designs and have found numerous applications in industry due to their lower manufacturing costs and higher performance levels. The tendency towards smaller feature sizes and increasing clock rates is placing higher demands on signal integrity design by highlighting previously negligible interconnect effects such as distortion, reflection, ringing, delay, and crosstalk. These effects if not predicted in the early stages of the design cycle can severely degrade circuit performance and reliability. The objective of this thesis is to develop new model order reduction (MOR) techniques to minimize the computational complexity of non-linear circuits and electronic systems that have delay elements. MOR techniques provide a mechanism to generate reduced order models from the detailed description of the original modified nodal analysis (MNA) formulation. The following contributions are made in this thesis: 1. The first project presents a methodology for reduction of Partial Element Equivalent Circuit (PEEC) models. PEEC method is widely used in electromagnetic compatibility and signal integrity problems in both the time and frequency domains. The PEEC model with retardation has been applied to 3-D analysis but often result in large and dense matrices, which are computationally expensive to solve. In this thesis, a new moment matching technique based on Multi-order Arnoldi is described to model PEEC networks with retardation. 2. The second project deals with developing an efficient model order reduction algorithm for simulating large interconnect networks with nonlinear elements. The proposed methodology is based on a multidimensional subspace method and uses constraint equations to link the nonlinear elements and biasing sources to the reduced order model. This approach significantly improves the simulation time of distributed nonlinear systems, since additional ports are not required to link the nonlinear elements to the reduced order model, yielding appreciable savings in the size of the reduced order model and computational time. 3. A parameterized reduction technique for nonlinear systems is presented. The proposed method uses multidimensional subspace and variational analysis to capture the variances of design parameters and approximates the weakly nonlinear functions as a Taylor series. An SVD approach is presented to address the efficiency of reduced order model. The proposed methodology significantly improves the simulation time of weakly nonlinear systems since the size of the reduced system is smaller than the original system and a new reduced model is not required each time a design parameter is changed

Addressing Computational Complexity of Electromagnetic Systems Using Parameterized Model Order Reduction

As operating frequencies increase, full wave numerical techniques such as the finite element method (FEM) become necessary for the analysis of high-frequency and microwave circuit structures. However, the FEM formulation of microwave circuits often results in very large systems of equations which are computationally expensive to solve. The objective of this thesis is to develop new parameterized model order eduction (MOR) techniques to minimize the computational complexity of microwave circuits. MOR techniques provide a mechanism to generate reduced order models from the detailed description of the original FEM formulation. The following contributions are made in this thesis: 1. The first project deals with developing a parameterized model order reduction to solve eigenvalue equations of electromagnetic structures that are discretized by using FEM. The proposed algorithm uses a multidimensional subspace method based on modified perturbation theory and singular-value decomposition to perform reduction directly on the finite element eigenvalue equations. This procedure generates parametric reduced order models that are valid over the desired parameter range without the need to redo the reduction when design parameters are changed. This provides significant computational savings when compared to previous eigenvalue MOR techniques, since a new reduced order model is not required each time a design parameter is changed. 2. Implicit moment match techniques such as the Arnoldi algorithm are often used to improve the accuracy of the reduced order model. However, the traditional Arnoldi algorithm is only applicable to first order linear systems and can not directly include arbitrary functions of frequency due to material and boundary conditions. In this work, an efficient algorithm to create parametric reduced order models of distributed electromagnetic systems that have arbitrary functions of frequency (due to material properties, boundary conditions, and delay elements) and design parameters. The proposed method is based on a multi-order Arnoldi algorithm used to implicitly calculate the moments with respect to frequency and design parameters, as well as the cross-moments. This procedure generates parametric reduced order models that are valid over the desired parameter range without the need to redo the reduction when design parameters are changed and provides more accurate reduced order systems when compared with traditional approaches such as Modified Gram Schmidt. 3. This project develops an efficient technique to calculate sensitivities of microwave structures with respect to network design parameters. The proposed algorithm uses a parametric reduced order model to solve the original network and an adjoint variable method to calculate sensitivities. Important features of the proposed method are 1) that the solution of the original network as well as sensitivities with respect to any parameter is obtained from the solution of the reduced order model, and 2) a new reduced order model is not required each time design parameters are varied

Physics-based passivity-preserving parameterized model order reduction for PEEC circuit analysis

The decrease of integrated circuit feature size and the increase of operating frequencies require 3-D electromagnetic methods, such as the partial element equivalent circuit (PEEC) method, for the analysis and design of high-speed circuits. Very large systems of equations are often produced by 3-D electromagnetic methods, and model order reduction (MOR) methods have proven to be very effective in combating such high complexity. During the circuit synthesis of large-scale digital or analog applications, it is important to predict the response of the circuit under study as a function of design parameters such as geometrical and substrate features. Traditional MOR techniques perform order reduction only with respect to frequency, and therefore the computation of a new electromagnetic model and the corresponding reduced model are needed each time a design parameter is modified, reducing the CPU efficiency. Parameterized model order reduction (PMOR) methods become necessary to reduce large systems of equations with respect to frequency and other design parameters of the circuit, such as geometrical layout or substrate characteristics. We propose a novel PMOR technique applicable to PEEC analysis which is based on a parameterization process of matrices generated by the PEEC method and the projection subspace generated by a passivity-preserving MOR method. The proposed PMOR technique guarantees overall stability and passivity of parameterized reduced order models over a user-defined range of design parameter values. Pertinent numerical examples validate the proposed PMOR approach

Delay Extraction Based Equivalent Elmore Model For RLC On-Chip Interconnects

As feature sizes for VLSI technology is shrinking, associated with higher operating frequency, signal integrity analysis of on-chip interconnects has become a real challenge for circuit designers. For this purpose, computer-aided-design (CAD) tools are necessary to simulate signal propagation of on-chip interconnects which has been an active area for research. Although SPICE models exist which can accurately predict signal degradation of interconnects, they are computationally expensive. As a result, more effective and analytic models for interconnects are required to capture the response at the output of high speed VLSI circuits. This thesis contributes to the development of efficient and closed form solution models for signal integrity analysis of on-chip interconnects. The proposed model uses a delay extraction algorithm to improve the accuracy of two-pole Elmore based models used in the analysis of on-chip distributed RLC interconnects. In the proposed scheme, the time of fight signal delay is extracted without increasing the number of poles or affecting the stability of the transfer function. This algorithm is used for both unit step and ramp inputs. From the delay rational approximation of the transfer function, analytic fitted expressions are obtained for the 50% delay and rise time for unit step input. The proposed algorithm is tested on point to point interconnections and tree structure networks. Numerical examples illustrate improved 50% delay and rise time estimates when compared to traditional Elmore based two-pole models