86,959 research outputs found
Automatic Verification of Message-Based Device Drivers
We develop a practical solution to the problem of automatic verification of
the interface between device drivers and the OS. Our solution relies on a
combination of improved driver architecture and verification tools. It supports
drivers written in C and can be implemented in any existing OS, which sets it
apart from previous proposals for verification-friendly drivers. Our
Linux-based evaluation shows that this methodology amplifies the power of
existing verification tools in detecting driver bugs, making it possible to
verify properties beyond the reach of traditional techniques.Comment: In Proceedings SSV 2012, arXiv:1211.587
Space station automation of common module power management and distribution, volume 2
The new Space Station Module Power Management and Distribution System (SSM/PMAD) testbed automation system is described. The subjects discussed include testbed 120 volt dc star bus configuration and operation, SSM/PMAD automation system architecture, fault recovery and management expert system (FRAMES) rules english representation, the SSM/PMAD user interface, and the SSM/PMAD future direction. Several appendices are presented and include the following: SSM/PMAD interface user manual version 1.0, SSM/PMAD lowest level processor (LLP) reference, SSM/PMAD technical reference version 1.0, SSM/PMAD LLP visual control logic representation's (VCLR's), SSM/PMAD LLP/FRAMES interface control document (ICD) , and SSM/PMAD LLP switchgear interface controller (SIC) ICD
A Method for the Combination of Stochastic Time Varying Load Effects
The problem of evaluating the probability that a structure becomes unsafe under a
combination of loads, over a given time period, is addressed. The loads and load effects
are modeled as either pulse (static problem) processes with random occurrence time, intensity and a specified shape or intermittent continuous (dynamic problem) processes which
are zero mean Gaussian processes superimposed 'on a pulse process. The load coincidence
method is extended to problems with both nonlinear limit states and dynamic responses,
including the case of correlated dynamic responses. The technique of linearization of a
nonlinear limit state commonly used in a time-invariant problem is investigated for timevarying
combination problems, with emphasis on selecting the linearization point. Results
are compared with other methods, namely the method based on upcrossing rate, simpler
combination rules such as Square Root of Sum of Squares and Turkstra's rule. Correlated
effects among dynamic loads are examined to see how results differ from correlated static
loads and to demonstrate which types of load dependencies are most important, i.e., affect'
the exceedance probabilities the most.
Application of the load coincidence method to code development is briefly discussed.National Science Foundation Grants CME 79-18053 and CEE 82-0759
An expert system for satellite and instrument data anomaly and fault isolation
A prototype Generic Payload Operations Control System (GPOCC) is being developed at the NASA Jet Propulsion Laboratory to provide a low-cost command and control processing center for science instruments and small payloads. The GPOCC supports the difficult transition from integration and test to flight operations. The prototype will incorporate four expert systems to perform telemetry, command, and mission planning functions as well as telecommunications scheduling. The first of these expert systems to be developed will perform telemetry data analysis and fault isolation, as well as propose corrective action. This Data Analysis Module (DAM) will monitor telemetry data and perform continual data monitoring and trend analysis based on a knowledge base and historic data archived on an optical disk storage device. The system maintains a continuous knowledge database of past system performance characteristics. The goal of the Data Analysis Module is to achieve consistent, dependable and validatable performance, to demonstrate thorough, reliable and fast reasoning, and to reduce the concentration demanded of flight analysis personnel
Verifiably-safe software-defined networks for CPS
Next generation cyber-physical systems (CPS) are expected to be deployed in domains which require scalability as well as performance under dynamic conditions. This scale and dynamicity will require that CPS communication networks be programmatic (i.e., not requiring manual intervention at any stage), but still maintain iron-clad safety guarantees. Software-defined networking standards like OpenFlow provide a means for scalably building tailor-made network architectures, but there is no guarantee that these systems are safe, correct, or secure. In this work we propose a methodology and accompanying tools for specifying and modeling distributed systems such that existing formal verification techniques can be transparently used to analyze critical requirements and properties prior to system implementation. We demonstrate this methodology by iteratively modeling and verifying an OpenFlow learning switch network with respect to network correctness, network convergence, and mobility-related properties. We posit that a design strategy based on the complementary pairing of software-defined networking and formal verification would enable the CPS community to build next-generation systems without sacrificing the safety and reliability that these systems must deliver
Synthesis and Optimization of Reversible Circuits - A Survey
Reversible logic circuits have been historically motivated by theoretical
research in low-power electronics as well as practical improvement of
bit-manipulation transforms in cryptography and computer graphics. Recently,
reversible circuits have attracted interest as components of quantum
algorithms, as well as in photonic and nano-computing technologies where some
switching devices offer no signal gain. Research in generating reversible logic
distinguishes between circuit synthesis, post-synthesis optimization, and
technology mapping. In this survey, we review algorithmic paradigms ---
search-based, cycle-based, transformation-based, and BDD-based --- as well as
specific algorithms for reversible synthesis, both exact and heuristic. We
conclude the survey by outlining key open challenges in synthesis of reversible
and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table
RSGM: Real-time Raster-Respecting Semi-Global Matching for Power-Constrained Systems
Stereo depth estimation is used for many computer vision applications. Though
many popular methods strive solely for depth quality, for real-time mobile
applications (e.g. prosthetic glasses or micro-UAVs), speed and power
efficiency are equally, if not more, important. Many real-world systems rely on
Semi-Global Matching (SGM) to achieve a good accuracy vs. speed balance, but
power efficiency is hard to achieve with conventional hardware, making the use
of embedded devices such as FPGAs attractive for low-power applications.
However, the full SGM algorithm is ill-suited to deployment on FPGAs, and so
most FPGA variants of it are partial, at the expense of accuracy. In a non-FPGA
context, the accuracy of SGM has been improved by More Global Matching (MGM),
which also helps tackle the streaking artifacts that afflict SGM. In this
paper, we propose a novel, resource-efficient method that is inspired by MGM's
techniques for improving depth quality, but which can be implemented to run in
real time on a low-power FPGA. Through evaluation on multiple datasets (KITTI
and Middlebury), we show that in comparison to other real-time capable stereo
approaches, we can achieve a state-of-the-art balance between accuracy, power
efficiency and speed, making our approach highly desirable for use in real-time
systems with limited power.Comment: Accepted in FPT 2018 as Oral presentation, 8 pages, 6 figures, 4
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