Exploring performance and power properties of modern multicore chips via simple machine models

Modern multicore chips show complex behavior with respect to performance and power. Starting with the Intel Sandy Bridge processor, it has become possible to directly measure the power dissipation of a CPU chip and correlate this data with the performance properties of the running code. Going beyond a simple bottleneck analysis, we employ the recently published Execution-Cache-Memory (ECM) model to describe the single- and multi-core performance of streaming kernels. The model refines the well-known roofline model, since it can predict the scaling and the saturation behavior of bandwidth-limited loop kernels on a multicore chip. The saturation point is especially relevant for considerations of energy consumption. From power dissipation measurements of benchmark programs with vastly different requirements to the hardware, we derive a simple, phenomenological power model for the Sandy Bridge processor. Together with the ECM model, we are able to explain many peculiarities in the performance and power behavior of multicore processors, and derive guidelines for energy-efficient execution of parallel programs. Finally, we show that the ECM and power models can be successfully used to describe the scaling and power behavior of a lattice-Boltzmann flow solver code.Comment: 23 pages, 10 figures. Typos corrected, DOI adde

Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks

This paper presents an in-depth analysis of Intel's Haswell microarchitecture for streaming loop kernels. Among the new features examined is the dual-ring Uncore design, Cluster-on-Die mode, Uncore Frequency Scaling, core improvements as new and improved execution units, as well as improvements throughout the memory hierarchy. The Execution-Cache-Memory diagnostic performance model is used together with a generic set of microbenchmarks to quantify the efficiency of the microarchitecture. The set of microbenchmarks is chosen such that it can serve as a blueprint for other streaming loop kernels.Comment: arXiv admin note: substantial text overlap with arXiv:1509.0311

QUO VADIS MATERI PESAWAT SEDERHANA DALAM PEMBELAJARAN IPA SEKOLAH DASAR DI ERA DISRUPSI

Tujuan penelitian ini adalah mengkaji dan mempertanyakan peran materi pesawat sederhana dalam pembelajaran IPA jenjang MI/SD di era disrupsi. Metode penelitian menggunakan pendekatan kualitatif melalui studi kasus dengan observasi, dokumentasi dan semi-structured interview terhadap guru IPA SMP/MTs di Kalimantan Tengah kemudian data dianalisis secara deskriptif melalui studi kepustakaan. Hasil penelitian ini menunjukkan bahwa materi pesawat sederhana urgen dan bermanfaat diedukasi pada peserta didik MI/SD di era disrupsi saat ini. Ditinjau dari perkembangan, kegunaan, dan perannya di era disrupsi, materi pesawat sederhana (tuas, bidang miring, katrol, dan roda berporos) memberikan edukasi kepada peserta didik berupa prinsip kemudahan dan tidak instan. Selanjutnya, kajian pesawat sederhana relevan dengan tantangan yang dapat dijadikan peluang di era disrupsi, meliputi upaya meng-upgrade kualitas kurikulum, penanaman pendidikan nilai, kesadaran perubahan zaman, dan menemukan jati diri