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์ด์ข ๋ฉํฐ ์ฝ์ด ํ๋ก์ธ์์์ SDF/L ๊ทธ๋ํ ์ค์ผ์ค๋ง ๊ธฐ๋ฒ
ํ์๋
ผ๋ฌธ(์์ฌ) -- ์์ธ๋ํ๊ต๋ํ์ : ๊ณต๊ณผ๋ํ ์ปดํจํฐ๊ณตํ๋ถ, 2021.8. Ha Soonhoi.Although dataflow models are known to thrive at exploiting task-level parallelism of an application, it is difficult to exploit the parallelism of data. Data-level parallelism can be represented well with loop structures, but these structures are not explicitly specified in most existing dataflow models. SDF/L model was introduced to overcome this shortcoming by specifying the loop structures explicitly in a hierarchical fashion. To the best of our knowledge however, scheduling of SDF/L graph onto heterogeneous processors has not been considered in any previous work.
In this dissertation, we introduce a scheduling technique of an application represented by the SDF/L model onto heterogeneous processors. In the proposed method, we explore the mapping of tasks using an evolutionary meta-heuristic and schedule hierarchically in a bottom-up fashion, creating parallel loop schedules at lower levels first and then re-using them when constructing the schedule at a higher level. To verify the efficiency of the proposed scheduling methodology, we apply it to benchmark examples and randomly generated SDF/L graphs.๋ฐ์ดํฐํ๋ก์ฐ ๋ชจ๋ธ์ ์ ํ๋ฆฌ์ผ์ด์
์ ํ์คํฌ๋ฅผ ๋ณ๋ ฌ ์ฒ๋ฆฌํ ๋ ์ข์ ๋ชจ๋ธ๋ก ์๋ ค์ ธ ์์ง๋ง ๋ฐ์ดํฐ๋ฅผ ๋ณ๋ ฌ๋ก ์ฒ๋ฆฌํ๋ ๋ฐ์ ํ์ฉํ๊ธฐ๋ ์ด๋ ต๋ค. ๋ฐ์ดํฐ ์์ค ๋ณ๋ ฌ ์ฒ๋ฆฌ๋ ๋ฃจํ ๊ตฌ์กฐ๋ฅผ ํตํด ํํ๋ ์ ์์ผ๋ ๊ธฐ์กด ๋ฐ์ดํฐํ๋ก์ฐ ๋ชจ๋ธ์์ ๋ช
์์ ์ผ๋ก ๋ฃจํ ๊ตฌ์กฐ๋ ๋ช
์ธํ๋ ๋ฐฉ๋ฒ์ด ์์๋ค. ์ด๋ฌํ ๋จ์ ์ ๊ทน๋ณตํ๊ธฐ ์ํด ๊ณ์ธต์ ๊ตฌ์กฐ๋ฅผ ํ์ฉํ์ฌ ๋ฃจํ ๊ตฌ์กฐ๋ฅผ ๋ช
์์ ์ผ๋ก ๋ช
์ธํ ์ ์๋ SDF/L ๋ชจ๋ธ์ด ์ ์๋์๋ค. ๊ทธ๋ฌ๋ ์ด๊ธฐ์ข
ํ๋ก์ธ์์ ๋ํ SDF/L ๊ทธ๋ํ์ ์ค์ผ์ค๋ง์ ์ด์ ๊น์ง ๊ณ ๋ ค๋์ง ์์ ๊ฒ์ผ๋ก ํ์
๋๋ค.
๋ณธ ๋
ผ๋ฌธ์์๋ SDF/L ๋ชจ๋ธ๋ก ํํ๋๋ ์ ํ๋ฆฌ์ผ์ด์
์ ์ด๊ธฐ์ข
ํ๋ก์ธ์์ ๋ํ์ฌ ์ค์ผ์ค๋งํ๋ ๊ธฐ๋ฒ์ ์๊ฐํ๋ค. ์ ์๋ ๋ฐฉ๋ฒ์์๋ ๋จผ์ ์งํ์ ๋ฉํ ํด๋ฆฌ์คํฑ์ ์ฌ์ฉํ์ฌ ํ์คํฌ ๋งคํ์ ํ์ํ๋ค. ์ดํ ํ์ ์์ค์์ ๋ณ๋ ฌ ๋ฃจํ ์ค์ผ์ค์ ๋ง๋ ๋ค์ ์์ ์์ค์์ ์ค์ผ์ค ๊ตฌ์ฑํ ๋ ์ฌ์ฌ์ฉํ๋ ์ํฅ์์ ๊ณ์ธต์ ํ์คํฌ ์ค์ผ์ค๋ง์ ์ํํ๋ค. ์ ์ํ๋ ์ค์ผ์ค๋ง ๊ธฐ๋ฒ์ ํจ์จ์ฑ์ ๊ฒ์ฆํ๊ธฐ ์ํด ๋ฒค์น๋งํฌ ์์ ์ ๋ฌด์์๋ก ์์ฑ๋ SDF/L ๊ทธ๋ํ์ ๊ธฐ๋ฒ์ ์ ์ฉํ์๋ค.Chapter 1 Introduction 1
Chapter 2 Related Work 6
2.1 SDF Scheduling with Data-level Parallelism 8
2.2 Hierarchical Scheduling 9
Chapter 3 Problem and Challenges 11
3.1 Notations and Problem Description 11
3.2 Challenges 12
Chapter 4 Proposed methodology 15
4.1 Mapping Exploration 15
4.2 Priority Assignment and List Scheduling Heuristic 17
4.3 Hierarchical Scheduling 18
4.4 Complexity 23
Chapter 5 Experiments 24
5.1 Benchmarks 25
5.2 Randomly Generated Graphs 30
Chapter 6 Conclusions 35
Bibliography 37
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A Novel Workload Allocation Strategy for Batch Jobs
The distribution of computational tasks across a diverse set of geographically distributed heterogeneous resources is a critical issue in the realisation of true computational grids. Conventionally, workload allocation algorithms are divided into static and dynamic approaches. Whilst dynamic approaches frequently outperform static schemes, they usually require the collection and processing of detailed system information at frequent intervals - a task that can be both time consuming and unreliable in the real-world. This paper introduces a novel workload allocation algorithm for optimally distributing the workload produced by the arrival of batches of jobs. Results show that, for the arrival of batches of jobs, this workload allocation algorithm outperforms other commonly used algorithms in the static case. A hybrid scheduling approach (using this workload allocation algorithm), where information about the speed of computational resources is inferred from previously completed jobs, is then introduced and the efficiency of this approach demonstrated using a real world computational grid. These results are compared to the same workload allocation algorithm used in the static case and it can be seen that this hybrid approach comprehensively outperforms the static approach
System Synthesis for Embedded Multiprocessors
Modern embedded systems must increasingly
accommodate dynamically changing operating environments, high computational requirements, and tight time-to-market windows. Such trends and the ever-increasing design complexity of embedded systems have challenged designers to raise the level of abstraction and replace traditional ad-hoc approaches with more efficient synthesis
techniques. Additionally, since embedded multiprocessor systems are typically designed as final implementations for dedicated
functions, modifications to embedded system implementations are rare, and this allows embedded system designers to spend
significantly larger amounts of time to optimize the architecture and the employed software. This dissertation presents several system-level synthesis algorithms that employ time-intensive optimization techniques that allow the designer to explore a significantly larger part of the design space. It looks at critical issues that are at the core of the synthesis process ---
selecting the architecture, partitioning the
functionality over the components of the architecture, and scheduling activities such that design constraints and optimization objectives
are satisfied.
More specifically for the scheduling step, a new solution to the two-step multiprocessor scheduling problem is proposed. For the first step of clustering a highly efficient genetic algorithm is proposed. Several techniques for the second step of merging are proposed and finally a complete two-step effective solution is presented. Also, a randomization technique is applied to existing deterministic techniques to extend these techniques so that they can
utilize arbitrary increases in available optimization time. This novel framework for extending deterministic algorithms in our context allows for accurate and fair comparison of our techniques against the state of the art.
To further generalize the proposed clustering-based scheduling approach, a complementary two-step multiprocessor scheduling approach for
heterogeneous multiprocessor systems is presented. This work is amongst the first works that formally studies the application of
clustering to heterogeneous system scheduling. Several techniques are proposed and compared and conclusive results are presented.
A modular system-level synthesis framework is then proposed. It synthesizes multi-mode, multi-task embedded systems under a number of hard constraints; optimizes a comprehensive set of objectives; and provides a set of alternative trade-off points in a given multi-objective design evaluation space. An extension of the
framework is proposed to better address DVS, memory optimization, and efficient mappings onto dynamically reconfigurable hardware.
An integrated framework for energy-driven
scheduling onto embedded multiprocessor systems is proposed. It employs a solution representation that encodes both task assignment and ordering into a single chromosome and hence significantly
reduces the search space and problem complexity. It is shown that a task assignment and scheduling that result in better performance do not necessarily save power, and hence, integrating task scheduling and voltage scheduling is crucial for fully exploiting the energy-saving potential
of an embedded multiprocessor implementation
A Genetic Algorithm to Schedule Workflow Collections on a SOA-Grid with Communication Costs
International audienceIn this paper we study the problem of scheduling a collection of workflows, identical or not, on a SOA grid. A workflow (job) is represented by a directed acyclic graph (DAG) with typed tasks. All of the grid hosts are able to process a set of task types with unrelated processing costs and are able to transmit files through communication links for which the communication times are not negligible. The goal is to minimize the maximum completion time (makespan) of the workflows. To solve this problem we propose a genetic approach. The contributions of this paper are both the design of a Genetic Algorithm taking the communication costs into account and the performance analysis
Mapping tree-shaped workflows on systems with different memory sizes and processor speeds
Directed acyclic graphs are commonly used to model scientific workflows, by expressing dependencies between tasks, as well as the resource requirements of the workflow. As a special case, rooted directed trees occur in several applications, for instance in sparse matrix computations. Since typical workflows are modeled by large trees, it is crucial to schedule them efficiently, so that their execution time (or makespan) is minimized. Furthermore, it is usually beneficial to distribute the execution on several compute nodes, hence increasing the available memory, and allowing us to parallelize parts of the execution. To exploit the heterogeneity of modern clusters in this context, we investigate the partitioning and mapping of treeโshaped workflows on two types of target architecture models: in AM1, each processor can have a different memory size, and in AM2, each processor can also have a different speed (in addition to a different memory size). We design a threeโstep heuristic forย AM1, which adapts and extends previous work for homogeneous clustersย [Gou C, Benoit A, Marchal L. Partitioning treeโshaped task graphs for distributed platforms with limited memory. IEEE Trans Parallel Dist Syst 2020; 31(7): 1533โ1544]. The changes we propose concern the assignment to processors (accounting for the different memory sizes) and the availability of suitable processors when splitting or merging subtrees. For AM2, we extend the heuristic for AM1 with a twoโphase local search approach. Phase A is a swapโbased hill climber, while (the optional) Phase B is inspired by iterated local search. We evaluate our heuristics for AM1 and AM2 with extensive simulations, and we demonstrate that exploiting the heterogeneity in the cluster significantly reduces the makespan, compared to the state of the art for homogeneous processors.Peer Reviewe
QoS-aware predictive workflow scheduling
This research places the basis of QoS-aware predictive workflow scheduling. This research novel contributions will open up prospects for future research in handling complex big workflow applications with high uncertainty and dynamism. The results from the proposed workflow scheduling algorithm shows significant improvement in terms of the performance and reliability of the workflow applications
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