Feasibility of Using Bandwidth Efficient Modulation to Upgrade the CMS Tracker Readout Optical Links

Plans to upgrade the LHC after approximately 10 years of operation are currently being considered at CERN. A tenfold increase in luminosity delivered to the experiments is envisaged in the so-called Super LHC (SLHC). This will undoubtedly give rise to significantly larger data volumes from the detectors, requiring faster data readout. The possibility of upgrading the CMS Tracker analog readout optical links using a bandwidth efficient digital modulation scheme for deployment in the SLHC has been extensively explored at CERN. Previous theoretical and experimental studies determined the achievable data rate using a system based on Quadrature Amplitude Modulation (QAM) to be ~3-4Gbit/s (assuming no error correction is used and for an error rate of ~10-9). In this note we attempt to quantify the feasibility of such an upgrade in terms of hardware implementation complexity, applicability to the high energy physics (HEP) environment, technological feasibility and R&D effort required.Comment: CERN CMS Note. 16 pages, 10 figure

Arquiteturas paralelas avançadas para transmissores 5G totalmente digitais

The fifth generation of mobile communications (5G) is being prepared and should be rolled out in the early coming years. Massive number of Radio-Frequency (RF) front-ends, peak data rates of 10 Gbps (everywhere and everytime), latencies lower than 10 msec and huge device densities are some of the expected disruptive capabilities. At the same time, previous generations can not be jeopardized, fostering the design of novel flexible and highly integrated radio transceivers able to support the simultaneous transmission of multi-band and multi-standard signals. The concept of all-digital transmission is being pointed out as a promising architecture to cope with such challenging requirements, due to its fully digital radio datapath. This thesis is focused on the proposal and validation of fully integrated and advanced digital transmitter architectures that excel the state-of-the-art in different figures of merit, such as transmission bandwidth, spectral purity, carrier agility, flexibility, and multi-band capability. The first part of this thesis introduces the concept of all-digital RF transmission. In particular, the foundations inherent to this thematic line are given, together with the recent advances reported in the state-of-the-art architectures.The core of this thesis, containing the main developments achieved during the Ph.D. work, is then presented and discussed. The first key contribution to the state-of-the-art is the use of cascaded Delta-Sigma (∆Σ) architectures to relax the analog filtering requirements of the conventional All-Digital Transmitters while maintaining the constant envelope waveform. Then, it is presented the first reported architecture where Antenna Arrays are directly driven by single-chip and single-bit All-Digital Transmitters, with promising results in terms of simplification of the RF front-ends and overall flexibility. Subsequently, the thesis proposes the first reported RF-stage All-Digital Transmitter that can be embedded within a single Field-Programmable Gate Array (FPGA) device. Thereupon, novel techniques to enable the design of wideband All-Digital Transmitters are reported. Finally, the design of concurrent multi-band transmitters is introduced. In particular, the design of agile and flexible dual and triple bands All-DigitalTransmitter (ADT) is demonstrated, which is a very important topic for scenarios that demand carrier aggregation. This Ph.D. contributes withseveral advances to the state-of-the-art of RF all-digital transmitters.A quinta geração de comunicações móveis (5G) está a ser preparada e deve ser comercializada nos próximos anos. Algumas das caracterı́sticas inovadoras esperadas passam pelo uso de um número massivo de font-ends de Rádio-Frequência (RF), taxas de pico de transmissão de dados de 10 Gbps (em todos os lugares e em todas as ocasiões), latências inferiores a 10 mseg e elevadas densidades de dispositivos. Ao mesmo tempo, as gerações anteriores não podem ser ignoradas, fomentando o design de novos transceptores de rádio flexı́veis e altamente integrados, capazes de suportar a transmissão simultânea de sinais multi-banda e multi-standard. O conceito de transmissão totalmente digital é considerado como um tipo de arquitetura promissora para lidar com esses requisitos desafiantes, devido ao seu datapath de rádio totalmente digital. Esta tese é focada na proposta e validação de arquiteturas de transmissores digitais totalmente integradas e avançadas que ultrapassam o estado da arte em diferentes figuras de mérito, como largura de banda de transmissão, pureza espectral, agilidade de portadora, flexibilidade e capacidade multibanda. A primeira parte desta tese introduz o conceito de transmissores de RF totalmente digitais. Em particular, os fundamentos inerentes a esta linha temática são apresentados, juntamente com os avanços mais recentes do estado-da-arte. O núcleo desta tese, contendo os principais desenvolvimentos alcançados durante o trabalho de doutoramento, é então apresentado e discutido. A primeira contribuição fundamental para o estado da arte é o uso de arquiteturas em cascata com moduladores ∆Σ para relaxar os requisitos de filtragem analógica dos transmissores RF totalmente digitais convencionais, mantendo a forma de onda envolvente constante. Em seguida, é apresentada a primeira arquitetura em que agregados de antenas são excitados diretamente por transmissores digitais de um único bit inseridos num único chip, com resultados promissores em termos de simplificação dos front-ends de RF e flexibilidade em geral. Posteriormente, é proposto o primeiro transmissor totalmente digital RF-stage relatado que pode ser incorporado dentro de um único Agregado de Células Lógicas Programáveis. Novas técnicas para permitir o desenho de transmissores RF totalmente digitais de banda larga são também apresentadas. Finalmente, o desenho de transmissores simultâneos de múltiplas bandas é exposto. Em particular, é demonstrado o desenho de transmissores de duas e três bandas ágeis e flexı́veis, que é um tópico essencial para cenários que exigem agregação de múltiplas bandas.Apoio financeiro da Fundação para a Ciência e Tecnologia (FCT) no âmbito de uma bolsa de doutoramento, ref. PD/BD/105857/2014.Programa Doutoral em Telecomunicaçõe

Analysis and design of ΣΔ Modulators for Radio Frequency Switchmode Power Amplifiers

Power amplifiers are an integral part of every basestation, macrocell, microcell and mobile phone, enabling data to be sent over the distances needed to reach the receiver’s antenna. While linear operation is needed for transmitting WCDMA and OFDM signals, linear operation of a power amplifier is characterized by low power efficiency, and contributes to unwanted power dissipation in a transmitter. Recently, a switchmode power amplifier operation was considered for reducing power losses in a RF transmitter. A linear and efficient operation of a PA can be achieved when the transmitted RF signal is ΣΔ modu- lated, and subsequently amplified by a nonlinear device. Although in theory this approach offers linearity and efficiency reaching 100%, the use of ΣΔ modulation for transmitting wideband signals causes problems in practical implementation: it requires high sampling rate by the digital hardware, which is needed for shaping large contents of a quantization noise induced by the modulator but also, the binary output from the modulator needs an RF power amplifier operating over very wide frequency band. This thesis addresses the problem of noise shaping in a ΣΔ modulator and nonlinear distortion caused by broadband operation in switchmode power amplifier driven by a ΣΔ modulated waveform. The problem of sampling rate increase in a ΣΔ modulator is solved by optimizing structure of the modulator, and subsequent processing of an input signal’s samples in parallel. Independent from the above, a novel technique for reducing quan- tization noise in a bandpass ΣΔ modulator using single bit quantizer is presented. The technique combines error pulse shaping and 3-level quantization for improving signal to noise ratio in a 2-level output. The improvement is achieved without the increase of a digital hardware’s sampling rate, which is advantageous also from the perspective of power consumption. The new method is explored in the course of analysis, and verified by simulated and experimental results. The process of RF signal conversion from the Cartesian to polar form is analyzed, and a signal modulator for a polar transmitter with a ΣΔ-digitized envelope signal is designed and implemented. The new modulator takes an advantage of bandpass digital to analog conversion for simplifying the analog part of the modulator. A deformation of the pulsed RF signal in the experimental modulator is demonstrated to have an effect primarily on amplitude of the RF signal, which is correctable with simple predistortion

An RF Carrier Bursting System using Partial Quantization Noise Cancellation

This paper introduces a novel method for bandpass cancellation of the quantization noise occurring in high efficiency, envelope pulsed transmitter architectures - or carrier bursting. An equivalent complex baseband model of the proposed system, including the Sigma Delta-modulator and cancellation signal generation, is developed. Analysis of the baseband model is performed, leading to analytical expressions of the power amplifier drain efficiency, assuming the use of an ideal class B power amplifier. These expressions are further used to study the impact of key system parameters, i.e. the compensation signal variance and clipping probability, on the class~B power amplifier drain efficiency and signal-to-noise ratio. The paper concludes with simulations followed by practical measurements in order to validate the functionality of the method and to evaluate the performance-trend predictions made by the theoretical framework in terms of efficiency and spectral purity

Space-Time Codes Concatenated with Turbo Codes over Fading Channels

The uses of space-time code (STC) and iterative processing have enabled robust communications over fading channels at previously unachievable signal-to-noise ratios. Maintaining desired transmission rate while improving the diversity from STC is challenging, and the performance of the STC suffers considerably due to lack of channel state information (CSI). This dissertation research addresses issues of considerable importance in the design of STC with emphasis on efficient concatenation of channel coding and STC with theoretical bound derivation of the proposed schemes, iterative space-time trellis coding (STTC), and differential space-time codes. First, we concatenate space-time block code (STBC) with turbo code for improving diversity gain as well as coding gain. Proper soft-information sharing is indispensable to the iterative decoding process. We derive the required soft outputs from STBC decoders for passing to outer turbo code. Traditionally, the performance of STBC schemes has been evaluated under perfect channel estimation. For fast time-varying channel, obtaining the CSI is tedious if not impossible. We introduce a scheme of calculating the CSI at the receiver from the received signal without the explicit channel estimation. The encoder of STTC, which is generally decoded using Viterbi like algorithm, is based on a trellis structure. This trellis structure provides an inherent advantage for the STTC scheme that an iterative decoding is feasible with the minimal addition computational complexity. An iteratively decoded space-time trellis coding (ISTTC) is proposed in this dissertation, where the STTC schemes are used as constituent codes of turbo code. Then, the performance upper bound of the proposed ISTTC is derived. Finally, for implementing STBC without channel estimation and maintaining trans- mission rate, we concatenate differential space-time block codes (DSTBC) with ISTTC. The serial concatenation of DSTBC or STBC with ISTTC offers improving performance, even without an outer channel code. These schemes reduce the system complexity com- pared to the standalone ISTTC and increase the transmission rate under the same SNR condition. Detailed design procedures of these proposed schemes are analyzed

Digital modems for mobile systems

Digital modems for mobile system

Investigation of Time Domain Modulation and Switching-Mode Power Amplifiers Suitable for Digitally-Assisted Transmitters

Innovation in wireless communication has resulted in accelerating demand for smartphones using multiple communications protocols such as WiFi, Bluetooth and the many cellular standards deployed around the world. The variety of frequency, bandwidth and power requirements associated with each standard typically calls for the implementation of separate radio frequency (RF) front end hardware for each standard. This is a less-than-ideal solution in terms of cost and device area. Software-defined radio (SDR) promises to solve this problem by allowing the RF hardware to be digitally reconfigurable to adapt to any wireless standard. The application of machine learning and cognition algorithms to SDR will enable cognitive radios and cognitive wireless networks, which will be able to intelligently adapt to user needs and surrounding radio spectrum conditions. The challenge of fully reconfigurable transceivers is in implementing digitally-controlled RF circuits which have comparable performance to their fixed-frequency counterparts. Switching-mode power amplifiers (SMPA) are likely to be an important part of fully reconfigurable transmitters since their switching operation provides inherent compatibility with digital circuits, with the added benefit of very high efficiency. As a step to understanding the RF requirements of high efficiency and switching PAs, an inverse class F PA in push-pull configuration is implemented. This configuration is chosen for its similarity to the current mode class D (CMCD) topology. The fabricated PA achieves a peak drain efficiency of over 75% with 42.7 dBm (18.6 W) output power at 2.46 GHz. Since SMPAs cannot directly provide the linearity required by current and future wireless communications standards, amplitude information must be encoded into the RF signal in a different way. Given the superior time resolution of digital integrated circuit (IC) technology, a logical solution is to encode this information into the timing of the signal. The two most common techniques for doing so are pulse width modulation and delta-sigma modulation. However, the design of delta-sigma modulators requires simulation as part of the design process due to the lack of closed-form relationships between modulator parameters (such as resolution and oversampling) and performance figures (such as coding efficiency and signal quality). In particular, the coding efficiency is often ignored although it is an important part of ensuring transmitter efficiency with respect to the desired signal. A study of these relationships is carried out to observe the tradeoffs between them. It is found that increasing the speed or complexity of a DS modulated system does not necessarily translate to performance benefits as one might expect. These observations can have a strong impact on design choices at the system level

Digital Radio Encoding and Power Amplifier Design for Multimode and Multiband Wireless Communications

The evolution of wireless technology has necessitated the support of multiple communication standards by mobile devices. At present, multiple chipsets/radios operating at predefined sets of modulation schemes, frequency bands, bandwidths and output power levels are used to achieve this objective. This leads to higher component counts, increased cost and limits the capacity to cope with future communication standards. In order to tackle different wireless standards using a single chipset, digital circuits have been increasingly deployed in radios and demonstrated re-configurability in different modulation schemes (multimode) and frequency bands (multiband). Despite efforts and progress made in digitizing the entire radio, the power amplifier (PA) is still designed using an conventional approach and has become the bottleneck in digital transmitters, in terms of low average power efficiency, poor compatibility with modern CMOS technology and limited re-configurability. This research addresses these issues from two aspects. The first half of the thesis investigates signal encoding issues between the modulator and PA. We propose, analyze and evaluate a new hybrid amplitude/time signal encoding scheme that significantly improves the coding efficiency and dynamic range of a digitally modulated power amplifier (DMPA) without significantly increasing design complexity. The proposed hybrid amplitude/time encoding scheme combines both the amplitude domain and the time domain to optimally encode information. Experimental results show that hybrid amplitude/time encoding results in a 35% increase in the average coding efficiency with respect to conventional time encoding, and is only 6.7% lower than peak efficiency when applied to a Wireless Local Area Network (WLAN) signal with a peak to average power ratio equal to 9.9 dB. A new DMPA architecture, based on the proposed hybrid encoding, is also proposed. The second half of this thesis presents the design, analysis and implementation of a CMOS PA that is amenable to the proposed hybrid encoding scheme. A multi-way current mode class-D PA architecture has been proposed and realized in 130 nm CMOS technology. The designed PA has satisfied the objectives of wide bandwidth (1.5 GHz - 2.7 GHz at 1 dB output power), and high efficiency (PAE 63%) in addition to demonstrating linear responses using the proposed digital encoding. A complete digital transmitter combining the encoder and the multi-way PA was also investigated. The overall efficiency is 27% modulating 7.3 dB peak to average power ratio QAM signals

Performance of the CMS Tracker Optical Links and Future Upgrade Using Bandwidth Efficient Digital Modulation

The Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) particle accelerator will begin operation in 2007. The innermost CMS subdetector, the Tracker, comprises ~10 million detector channels read out by ~40 000 analog optical links. The optoelectronic components have been designed to meet the stringent requirements of a high energy physics (HEP) experiment in terms of radiation hardness, low mass and low power. Extensive testing has been performed on the components and on complete optical links in test systems. Their functionality and performance in terms of gain, noise, linearity, bandwidth and radiation hardness is detailed. Particular emphasis is placed on the gain, which directly affects the dynamic range of the detector data. It has been possible to accurately predict the variation in gain that will be observed throughout the system. A simulation based on production test data showed that the average gain would be ~38% higher than the design target at the Tracker operating temperature of -10°C. Corrective action was taken to reduce the gains and recover the lost dynamic range by lowering the optical receiver's load resistor value from 100Ω to 62Ω. All links will have gains between 0.64 and 0.96V/V. The future iteration of CMS will be operated in an upgraded LHC requiring faster data readout. In order to preserve the large investments made for the current readout system, an upgrade path that involves reusing the existing optoelectronic components is considered. The applicability of Quadrature Amplitude Modulation (QAM) in a HEP readout system is examined. The method for calculating the data rate is presented, along with laboratory tests where QAM signals were transmitted over a Tracker optical link. The results show that 3-4Gbit/s would be possible if such a design can be implemented (over 10 times the equivalent data rate of the current analog links, 320Mbits/s).(Abridged version) The CMS experiment at the LHC will begin operation in 2007. The CMS Tracker sub-detector, comprises ~10 million detector channels read out by ~40 000 analog optical links. The optoelectronic components have been designed to meet the stringent requirements of a HEP experiment in terms of radiation hardness, low mass and low power. Extensive testing has been performed on the components and on complete optical links in test systems. Their functionality and performance in terms of gain, noise, linearity, bandwidth and radiation hardness is detailed. Particular emphasis is placed on the gain, which directly affects the dynamic range of the detector data. It has been possible to accurately predict the variation in gain that will be observed throughout the system. A simulation based on production test data showed that the average gain would be ~38% higher than the design target at the Tracker operating temperature of -10{\deg}C. Corrective action was taken to reduce the gains and recover the lost dynamic range by lowering the optical receiver's load resistor value from 100{\Omega} to 62{\Omega}. All links will have gains between 0.64 and 0.96V/V. The future iteration of CMS will be operated in an upgraded LHC requiring faster data readout. In order to preserve the large investments made for the current readout system, an upgrade path that involves reusing the existing optoelectronic components is considered. The applicability of Quadrature Amplitude Modulation (QAM) in a HEP readout system is examined. The method for calculating the data rate is presented, along with laboratory tests where QAM signals were transmitted over a Tracker optical link. The results show that 3-4Gbit/s would be possible if such a design can be implemented (over 10 times the equivalent data rate of the current analog links, 320Mbits/s)