721 research outputs found
Integrated multilevel converter and battery management
A cascaded H-bridge multilevel converter is proposed as a BLDC drive incorporating real-time battery management. Intelligent H-bridges are used to monitor battery cells whilst simultaneously increasing their performance by reducing the variation between cells and controlling their discharge profiles
Design of adaptive analog filters for magnetic front-end read channels
Esta tese estuda o projecto e o comportamento de filtros em tempo contínuo de
muito-alta-frequência. A motivação deste trabalho foi a investigação de soluções de filtragem
para canais de leitura em sistemas de gravação e reprodução de dados em suporte
magnético, com custos e consumo (tamanho total inferior a 1 mm2 e consumo inferior a
1mW/polo), inferiores aos circuitos existentes. Nesse sentido, tal como foi feito neste
trabalho, o rápido desenvolvimento das tecnologias de microelectrónica suscitou esforços
muito significativos a nível mundial com o objectivo de se investigarem novas técnicas
de realização de filtros em circuito integrado monolítico, especialmente em tecnologia
CMOS (Complementary Metal Oxide Semiconductor). Apresenta-se um estudo comparativo
a diversos níveis hierárquicos do projecto, que conduziu à realização e caracterização
de soluções com as características desejadas.
Num primeiro nível, este estudo aborda a questão conceptual da gravação e transmissão
de sinal bem como a escolha de bons modelos matemáticos para o tratamento da
informação e a minimização de erro inerente às aproximações na conformidade aos princípios
físicos dos dispositivos caracterizados.
O trabalho principal da tese é focado nos níveis hierárquicos da arquitectura do
canal de leitura e da realização em circuito integrado do seu bloco principal – o bloco de
filtragem. Ao nível da arquitectura do canal de leitura, apresenta-se um estudo alargado
sobre as metodologias existentes de adaptação de sinal e recuperação de dados em suporte
magnético. Este desígnio aparece no âmbito da proposta de uma solução de baixo custo,
baixo consumo, baixa tensão de alimentação e baixa complexidade, alicerçada em tecnologia
digital CMOS, para a realização de um sistema DFE (Decision Feedback Equalization)
com base na igualização de sinal utilizando filtros integrados analógicos em tempo
contínuo.
Ao nível do projecto de realização do bloco de filtragem e das técnicas de implementação
de filtros e dos seus blocos constituintes em circuito integrado, concluiu-se que
a técnica baseada em circuitos de transcondutância e condensadores, também conhecida como filtros gm-C (ou transcondutância-C), é a mais adequada para a realização de filtros
adaptativos em muito-alta-frequência. Definiram-se neste nível hierárquico mais baixo,
dois subníveis de aprofundamento do estudo no âmbito desta tese, nomeadamente: a pesquisa
e análise de estruturas ideais no projecto de filtros recorrendo a representações no
espaço de estados; e, o estudo de técnicas de realização em tecnologia digital CMOS de
circuitos de transcondutância para a implementação de filtros integrados analógicos em
tempo contínuo.
Na sequência deste estudo, apresentam-se e comparam-se duas estruturas de filtros
no espaço de estados, correspondentes a duas soluções alternativas para a realização de
um igualador adaptativo realizado por um filtro contínuo passa-tudo de terceira ordem,
para utilização num canal de leitura de dados em suporte magnético.
Como parte constituinte destes filtros, apresenta-se uma técnica de realização de
circuitos de transcondutância, e de realização de condensadores lineares usando matrizes
de transístores MOSFET para processamento de sinal em muito-alta-frequência realizada
em circuito integrado usando tecnologia digital CMOS submicrométrica. Apresentam-se
métodos de adaptação automática capazes de compensar os erros face aos valores nominais
dos componentes, devidos às tolerâncias inerentes ao processo de fabrico, para os
quais apresentamos os resultados de simulação e de medição experimental obtidos.
Na sequência deste estudo, resultou igualmente a apresentação de um circuito passível
de constituir uma solução para o controlo de posicionamento da cabeça de leitura
em sistemas de gravação/reprodução de dados em suporte magnético. O bloco proposto
é um filtro adaptativo de primeira ordem, com base nos mesmos circuitos de transcondutância
e técnicas de igualação propostos e utilizados na implementação do filtro adaptativo
de igualação do canal de leitura.
Este bloco de filtragem foi projectado e incluído num circuito integrado (Jaguar) de
controlo de posicionamento da cabeça de leitura realizado para a empresa ATMEL em
Colorado Springs, e incluído num produto comercial em parceria com uma empresa escocesa
utilizado em discos rígidos amovíveis.This thesis studies the design and behavior of continuous-time very-high-frequency
filters. The motivation of this work was the search for filtering solutions for the readchannel
in recording and reproduction of data on magnetic media systems, with costs and
consumption (total size less than 1 mm2 and consumption under 1mW/pole), lower than
the available circuits. Accordingly, as was done in this work, the rapid development of
microelectronics technology raised very significant efforts worldwide in order to investigate
new techniques for implementing such filters in monolithic integrated circuit, especially
in CMOS technology (Complementary Metal Oxide Semiconductor). We present
a comparative study on different hierarchical levels of the project, which led to the realization
and characterization of solutions with the desired characteristics.
In the first level, this study addresses the conceptual question of recording and
transmission of signal and the choice of good mathematical models for the processing of
information and minimization of error inherent in the approaches and in accordance with
the principles of the characterized physical devices.
The main work of this thesis is focused on the hierarchical levels of the architecture
of the read channel and the integrated circuit implementation of its main block - the filtering
block. At the architecture level of the read channel this work presents a comprehensive
study on existing methodologies of adaptation and signal recovery of data on
magnetic media. This project appears in the sequence of the proposed solution for a lowcost,
low consumption, low voltage, low complexity, using CMOS digital technology for
the performance of a DFE (Decision Feedback Equalization) based on the equalization of
the signal using integrated analog filters in continuous time.
At the project level of implementation of the filtering block and techniques for implementing
filters and its building components, it was concluded that the technique based
on transconductance circuits and capacitors, also known as gm-C filters is the most appropriate
for the implementation of very-high-frequency adaptive filters. We defined in
this lower level, two sub-levels of depth study for this thesis, namely: research and analysis
of optimal structures for the design of state-space filters, and the study of techniques for the design of transconductance cells in digital CMOS circuits for the implementation
of continuous time integrated analog filters.
Following this study, we present and compare two filtering structures operating in
the space of states, corresponding to two alternatives for achieving a realization of an
adaptive equalizer by the use of a continuous-time third order allpass filter, as part of a
read-channel for magnetic media devices.
As a constituent part of these filters, we present a technique for the realization of
transconductance circuits and for the implementation of linear capacitors using arrays of
MOSFET transistors for signal processing in very-high-frequency integrated circuits using
sub-micrometric CMOS technology. We present methods capable of automatic adjustment
and compensation for deviation errors in respect to the nominal values of the
components inherent to the tolerances of the fabrication process, for which we present
the simulation and experimental measurement results obtained.
Also as a result of this study, is the presentation of a circuit that provides a solution
for the control of the head positioning on recording/playback systems of data on magnetic
media. The proposed block is an adaptive first-order filter, based on the same transconductance
circuits and equalization techniques proposed and used in the implementation
of the adaptive filter for the equalization of the read channel.
This filter was designed and included in an integrated circuit (Jaguar) used to control
the positioning of the read-head done for ATMEL company in Colorado Springs, and
part of a commercial product used in removable hard drives fabricated in partnership with a Scottish company
Conversion from linear to circular polarization in FPGA
Context: Radio astronomical receivers are now expanding their frequency range
to cover large (octave) fractional bandwidths for sensitivity and spectral
flexibility, which makes the design of good analogue circular polarizers
challenging. Better polarization purity requires a flatter phase response over
increasingly wide bandwidth, which is most easily achieved with digital
techniques. They offer the ability to form circular polarization with perfect
polarization purity over arbitrarily wide fractional bandwidths, due to the
ease of introducing a perfect quadrature phase shift. Further, the rapid
improvements in field programmable gate arrays provide the high processing
power, low cost, portability and reconfigurability needed to make practical the
implementation of the formation of circular polarization digitally. Aims: Here
we explore the performance of a circular polarizer implemented with digital
techniques. Methods: We designed a digital circular polarizer in which the
intermediate frequency signals from a receiver with native linear polarizations
were sampled and converted to circular polarization. The frequency-dependent
instrumental phase difference and gain scaling factors were determined using an
injected noise signal and applied to the two linear polarizations to equalize
the transfer characteristics of the two polarization channels. This
equalization was performed in 512 frequency channels over a 512 MHz bandwidth.
Circular polarization was formed by quadrature phase shifting and summing the
equalized linear polarization signals. Results: We obtained polarization purity
of -25 dB corresponding to a D-term of 0.06 over the whole bandwidth.
Conclusions: This technique enables construction of broad-band radio astronomy
receivers with native linear polarization to form circular polarization for
VLBI.Comment: 11 pages 8 figure
Equalization in hard disk drive read channels
This paper presents a comprehensive non-exhaustive comparative study of hard disk drive read-channel equalization techniques used in the readback process of magnetically stored information. The main read channel architectures: partial-response maximum likelihood (PRML) and decision feedback equalization (DFE) based systems, are compared in power consumption, layout area, data signalling rate and data density. This work focuses on the key component of the read channel, presenting a continuous-time analog solution for the pulse-slimming equalizer capable of reducing power consumption and die area by a factor of ten, whilst showing equivalent response to a FIR filter implementation.info:eu-repo/semantics/acceptedVersio
A Modular Multi-level Converter for Energy Management of Hybrid Energy-Storage Systems in Electric Vehicles
Electric vehicles (EVs) are substantial applications of clean energy. Their effectiveness for mainstream transportation is predicated on the efficient use of stored energy within the vehicles’ power pack. Among rechargeable storage solutions, lithium-ion (Li-ion) battery cells have high energy density making them suitable to supply the EVs’ average power. However, the peak power requirements of the vehicles exert stress on the Li-ion cells due to their low pulsating power capabilities. Ultracapacitors can be used instead as the power-pulsating storage elements given their superior power density. Incorporating the two cell types for energy storage signifies a hybrid configuration that leads to challenging tasks in managing the energy between cells due to varying cell dynamics. Therefore, this study investigated the design of an end-to-end hybrid energy-storage and management system. The limitations of existing power electronics and control schemes were identified based on comparative analysis, both on a cell level and on a system level. Subsequently, an energy system was developed that utilized modular multi-level converters to manage the energy between the different cell types. The formulated control strategy accounted for various power modes and added immense flexibility in charge sharing through diverse switching states. Furthermore, the proposed configuration eliminated the conventional need for a system level drive inverter feeding the EV motor. Electro-mechanical modeling results and physical design merits verified the proposed configuration’s effectiveness in improving EV efficiency
Equalization in hard disk drive read channels
This paper presents a comprehensive non-exhaustive comparative study of hard disk drive read-channel equalization techniques used in the readback process of magnetically stored information. The main read channel architectures: partial-response maximum likelihood (PRML) and decision feedback equalization (DFE) based systems, are compared in power consumption, layout area, data signalling rate and data density. This work focuses on the key component of the read channel, presenting a continuous-time analog solution for the pulse-slimming equalizer capable of reducing power consumption and die area by a factor of ten, whilst showing equivalent response to a FIR filter implementation
Modeling, design, and implementation of a novel battery cell equalizer for electric, hybrid electric, and plug-in hybrid electric vehicles
In order to meet the stringent cost targets for electric, hybrid electric, and plug-in hybrid electric vehicles (EVs, HEVs and PHEVs), a serious improvement in battery cycle-life and safety is undoubtedly essential. More recently, lithium batteries, in the form of lithium-ion, lithium-polymer or lithium iron phosphate have been profoundly explored. Despite critical research initiatives, lithium-based batteries have not yet been able to meet the steep energy demands, long lifetime and low cost, unique to vehicular propulsion applications. One of the most practical techniques of improving overall performance is to use suitable power electronics intensive cell voltage equalizers in conjunction with on-board energy storage devices. There have been some interesting developments in this area during the last few years, but cost constraints and high current specifications have prevented the complete deployment of this versatile technology. The purpose of this thesis is to introduce a novel configuration for a cell voltage equalizer, with the potential of fulfilling the expectations of low cost, high current-capability, and high efficiency. This thesis consists of six parts: the first part deals with an introduction to the battery problems in electric vehicle applications; the second part deals with a review of the available popular cell equalizer configurations; the third part deals with an economic and feasibility analyses of battery cell equalizers. Thereafter, a detailed analysis of the proposed novel battery cell equalizer configuration is presented, comparing the theoretical models, modeling and simulation results, and prototype measurements. A separate chapter is discusses from the point of view of power electronic converter control, considering practical issues. Finally, the thesis discusses the major motivating inferences drawn from this work, and suggests possible future directions and trends, based on those conclusions
Automatic Target Handing Over System .
The image seen by the airborne seeker and the image (of the same scene) seen by the operator through the high resolution sensor (thermal sight) are different in spatial resolution. In order to establish the correlation between these two images, the thermal sight image needs to be resampled and made similar to the seeker image by applying a preprocessing technique. The preprocessing is carried out by a handling over system (HOS) that resamples the thermal sight image making it compatible with seeker image and hands over the resampled image to the seeker. This paper discusses the implementation of the suitable handling over algorithm. (Boland, J.S. et al. automatic target hand using correlation techniques. Technical report, Auburn University, Alabama, 31 January, 1977, pp.57-63). Emphasis is laid on developing suitable hardware and software and tests to match the two images obtained by two different sensors of the same scene. The hardware and software have been evaluated with sets of images. The H/W is designed around iAPX 86 family of processor and software is developed in PL/M. Hardware also includes the recording facility on a standard VCR, to record the performance of handling over electronics (HOE) during testing/flight trials. Evaluation of the system by realistically simulating the field scenario in the laboratory has shown that the HOS is functioning satisfactorily
Design and realization of a smart battery management system
Battery management system (BMS) emerges a decisive system component in battery-powered applications, such as (hybrid) electric vehicles and portable devices. However, due to the inaccurate parameter estimation of aged battery cells and multi-cell batteries, current BMSs cannot control batteries optimally, and therefore affect the usability of products. In this paper, we proposed a smart management system for multi-cell batteries, and discussed the development of our research study in three directions: i) improving the effectiveness of battery monitoring and current sensing, ii) modeling the battery aging process, and iii) designing a self-healing circuit system to compensate performance variations due to aging and other variations.published_or_final_versio
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