Energy efficient hardware acceleration of multimedia processing tools

The world of mobile devices is experiencing an ongoing trend of feature enhancement and generalpurpose multimedia platform convergence. This trend poses many grand challenges, the most pressing being their limited battery life as a consequence of delivering computationally demanding features. The envisaged mobile application features can be considered to be accelerated by a set of underpinning hardware blocks Based on the survey that this thesis presents on modem video compression standards and their associated enabling technologies, it is concluded that tight energy and throughput constraints can still be effectively tackled at algorithmic level in order to design re-usable optimised hardware acceleration cores. To prove these conclusions, the work m this thesis is focused on two of the basic enabling technologies that support mobile video applications, namely the Shape Adaptive Discrete Cosine Transform (SA-DCT) and its inverse, the SA-IDCT. The hardware architectures presented in this work have been designed with energy efficiency in mind. This goal is achieved by employing high level techniques such as redundant computation elimination, parallelism and low switching computation structures. Both architectures compare favourably against the relevant pnor art in the literature. The SA-DCT/IDCT technologies are instances of a more general computation - namely, both are Constant Matrix Multiplication (CMM) operations. Thus, this thesis also proposes an algorithm for the efficient hardware design of any general CMM-based enabling technology. The proposed algorithm leverages the effective solution search capability of genetic programming. A bonus feature of the proposed modelling approach is that it is further amenable to hardware acceleration. Another bonus feature is an early exit mechanism that achieves large search space reductions .Results show an improvement on state of the art algorithms with future potential for even greater savings

Analysis on Supercapacitor Assisted Low Dropout (SCALDO) Regulators

State-of-the-art electronic systems employ three fundamental techniques for DC-DC converters: (a) switch-mode power supplies (SMPS); (b) linear power supplies; (c) switched capacitor (charge pump) converters. In practical systems, these three techniques are mixed to provide a complex, but elegant, overall solution, with energy efficiency, effective PCB footprint, noise and transient performance to suit different electronic circuit blocks. Switching regulators have relatively high end-to-end efficiency, in the range of 70 to 93%, but can have issues with output noise and EMI/RFI emissions. Switched capacitor converters use a set of capacitors for energy storage and conversion. In general, linear regulators have low efficiencies in the range 30 to 60%. However, they have outstanding output characteristics such as low noise, excellent transient response to load current fluctuations, design simplicity and low cost design which are far superior to SMPS. Given the complex situation in switch-mode converters, low dropout (LDO) regulators were introduced to address the equirements of noise-sensitive and fast transient loads in portable devices. A typical commercial off-the-shelf LDO has its input voltage slightly higher than the desired regulated output for optimal efficiency. The approximate efficiency of a linear regulator, if the power consumed by the control circuits is negligible, can be expressed by the ratio of Vo/Vin. A very low frequency supercapacitor circulation technique can be combined with commercial low dropout regulator ICs to significantly increase the end-to-end efficiency by a multiplication factor in the range of 1.33 to 3, compared to the efficiency of a linear regulator circuit with the same input-output voltages. In this patented supercapacitor-assisted low dropout (SCALDO) regulator technique developed by a research team at the University of Waikato, supercapacitors are used as lossless voltage droppers, and the energy reuse occurs at very low frequencies in the range of less than ten hertz, eliminating RFI/EMI concerns. This SCALDO technique opens up a new approach to design step-down, DC-DC converters suitable for processor power supplies with very high end-to-end efficiency which is closer to the efficiencies of practical switching regulators, while maintaining the superior output specifications of a linear design. Furthermore, it is important to emphasize that the SCALDO technique is not a variation of well-known switched capacitor DC-DC converters. In this thesis, the basic SCALDO concept is further developed to achieve generalised topologies, with the relevant theory that can be applied to a converter with any input-output step-down voltage combination. For these generalised topologies, some important design parameters, such as the number of supercapacitors, switching matrix details and efficiency improvement factors, are derived to form the basis of designing SCALDO regulators. With the availability of commercial LDO ICs with output current ratings up to 10 A, and thin-prole supercapacitors with DC voltage ratings from 2.3 to 5.5 V, several practically useful, medium-current SCALDO prototypes: 12V-to-5V, 5V-to-2V, 5.5V-to-3.3V have been developed. Experimental studies were carried out on these SCALDO prototypes to quantify performance in terms of line regulation, load regulation, efficiency and transient response. In order to accurately predict the performance and associated waveforms of the individual phases (charge, discharge and transition) of the SCALDO regulator, Laplace transform-based theory for supercapacitor circulation is developed, and analytical predictions are compared with experimental measurements for a 12V-to-5V prototype. The analytical results tallied well with the practical waveforms observed in a 12V-to-5V converter, indicating that the SCALDO technique can be generalized to other versatile configurations, and confirming that the simplified assumptions used to describe the circuit elements are reasonable and justifiable. After analysing the performance of several SCALDO prototypes, some practical issues in designing SCALDO regulators have been identified. These relate to power losses and implications for future development of the SCALDO design

The principles and practice of the Xylophone Bar Magnetometer

PhD ThesisThis thesis reports on work undertaken to analyse, design, optimise, and fabricate a high-Quality factor mechanical resonant magnetometer, based on a Xylophone Bar Resonator (XBR). The principle of operation is based on the use of nodal supports to mechanically isolate a transverse beam vibrating in its fundamental mode. A control model is developed for the device, incorporating the effect of electromechanical parametric amplification. The device response and performance is shown to be strongly dependent on the Q factor of the sense element. The need for a quantitative model of XBR dynamics in order to design an optimal XBR is thus established. Using a Rayleigh-Ritz based approach, a model of the modal dynamics of an XBR is developed for the first time. In order to examine the efficacy of the nodal supports, a new model for support loss for resonators with two supports is developed and presented. Analytical models for other sources of dissipation are adapted for the first time to the XBR case. Combining these developments with a system level model allows for the development of a quantitative predictor of the fundamental and electronic noise limits on performance for an XBR. The model is solved over the operational range of geometric parameters, yielding optimisation criteria for the geometry. Corresponding predictions for the force and magnetic field sensitivity are presented. Based on the results, an optimised XBR design is exhibited for a macroscopic metal flexural XBM to be fabricated via Wire EDM. The fabricated devices are characterised, constituting the first demonstration of a macroscopic flexural XBR. The resulting Q factors and sensitivities are shown to be in agreement with the predictions. Fruitful directions for further work are suggested throughout the thesis and summarised in the conclusions. The original contribution to knowledge made by the thesis can be summarised as the development of an original and detailed theory of the principles of XBR optimisation for high Q, and demonstration of an operational macroscopic flexural XBM for the first time

High frequency solid-state power sources for induction heating

Induction heating and melting applications often require a power source to convert 3-phase mains input power to single-phase output power at a higher and variable frequency. Amongst various power conversion schemes, solid-state power converters using the most modern devices provide the best power control techniques available for this application. In designing for this purpose, careful consideration must be given to the characteristics of the load, which presents a very low power factor and an impedance possibly varying widely as the heating cycle proceeds. From the variety of thyristor commutation techniques commonly employed in high-power inverters, series load commutation is particularly suited to high-frequency applications, as it has an intrinsically high turn-off time for the circuit thyristors (clearly essential at high operational frequencies) and much reduced switching losses. However, series commutation circuits are load sensitive, and therefore require careful design, especially with an induction heating load. Recent developments in power conversion techniques have led to the elimination of the d.c. link in a.c. to a.c. power conversion, enabling both high operational efficiencies and substantial savings in the initial cost of the device to be achieved. This new type of converter (called a cycloinverter) power and frequency control facilities. However, in a cycloinverter, since high-frequency switching is performed simultaneously with rectification, these control schemes are dependent on the operational frequency. The direct power conversion in a cycloinverter causes, unfortunately, distortion currents in the input lines and the output circuit, and it is the designer's task to minimise these undesirable components. The project aims to investigate the potential uses, both of the series inverter in its high-frequency form and of the cycloinverter, as power sources for induction heating. Design criteria are established for each circuit, with consideration given to turn-off time, efficiency, power factor, component ratings and predicted load variations. Computer simulations of the converters are employed to investigate the different voltage and current waveforms in the circuits, and to establish how the performance of each inverter may be optimised and these are verified by results obtained an experimental prototypes

Exploring quantum many-body systems from the viewpoints of quantum computing and spectroscopy

Understanding quantum many-body behaviours such as exotic phases and spectroscopic properties in quantum materials and molecular systems is a long-standing problem of both fundamental and practical interest in quantum physics. This understanding provides insights into the true underlying physics of quantum many-body systems, aids in the prediction of the microscopic and macroscopic properties of those systems, and also advances the rational design and synthesis of novel materials. However, our ability to understand quantum many-body behaviours has hitherto been limited, due to the excessive demands imposed on classical computing by the inherent complexity of describing and analysing those behaviours. While the advent of quantum computing has opened up new possibilities for examining these questions, the current generation of quantum technology does not yet present a feasible, standalone way to solve the above problem. However, a fusion of classical and quantum approaches could arguably provide a viable way of exploring interesting quantum phenomena. The central objective of this thesis is to achieve such a synthesis in practice, and to establish a corresponding framework for the study of quantum many-body systems. One area of particular interest is the intersection between quantum computing and spectroscopy, specifically in terms of the latter's potential to greatly assist in the investigation of quantum many-body phenomena. Quantum many-body problems in general can be divided into two classes, static and dynamic problems, which correspond to the estimation of eigenstate properties (such as eigenenergies and order parameters in different phases), and dynamical properties (such as response to an external field). In Part II, I present a number of approaches to solve these static and dynamic problems. I initially establish a quantum computing framework based on hybrid quantum-classical tensor networks, which incorporate the inherent advantages of classical tensor networks and quantum computing to represent the quantum system. I then demonstrate how eigenstate properties can be estimated by a randomised linear-combination-of-unitary method, termed algorithmic cooling, with at most one ancillary qubit; this achieves a logarithmic circuit complexity with respect to precision in eigenstate property estimation, and reaches the Heisenberg limit in eigenenergy estimation. Turning to dynamic problems, I present an adaptive product formula approach to construct a low-depth quantum circuit for simulating quantum dynamics. I further show how to enable large-scale dynamics simulation based on hybrid tensor networks, followed by a perturbative approach to simulating quantum many-body dynamics. In Part III, I first demonstrate how spectroscopic features of quantum systems can be probed. Equipped with the framework and methods established and developed in this thesis, I study quantum many-body phenomena, and excitation spectra in interacting bosons, fermions, and quantum spins through numerics and experiments. In Part IV, the quantum resources required for the application of quantum computing to realistic problems in the near future are assessed, together with the challenges that accompany such application. This encompasses a discussion of the estimated resources needed for estimating eigenstate properties of spins, fermions and molecules, in respect of both noisy quantum processors and fault-tolerant quantum computers. I then address some of the inherent challenges of using near-term noisy quantum devices, such as encountering unavoidable quantum process errors and statistical errors, by applying error mitigation, and efficient grouping measurement schemes proposed in this thesis. Finally, I conclude with a few remarks on the development of quantum computing in solving quantum many-body systems, and I pose outlooks for further research in this field

Protection of physically compact multiterminal DC power systems

The use of DC for primary power distribution has the potential to bring significant design, cost and efficiency benefits to microgrid, shipboard and aircraft applications. The integration of active converter technologies within these networks is a key enabler for these benefits to be realised, however their influence on an electrical network's fault response can lead to exceptionally demanding protection requirements. This represents a significant barrier to more widespread adoption of DC power distribution. The principle challenge within the field is to develop protection solutions which do not significantly detract from the advantages which DC networks offer. This objective leads the thesis to not only consider how the protection challenges may be overcome but also how this can be achieved in a manner which can benefit the overall design of a system, inclusive of various system design objectives. The thesis proposes that this objective can be achieved through the operation of network protection within the initial transient period following the occurrence of a fault. In seeking to achieve this aim, the work presented within this thesis makes a number of contributions. The thesis categorises converter type based on the components which influence their fault response and then presents an analysis of the natural fault response of compact multiterminal DC power distribution networks containing these converters. Key factors such as the peak magnitudes and formation times of fault current profiles are determined and quantified as a function of network parameters, enabling protection system operating requirements to be established. Secondary fault effects such as voltage transients are also identified and quantified to illustrate the impact of suboptimal protection system operation. The capabilities of different protection methods and technologies for achieving the proposed operating requirements are then analysed. Significant conclusions are: solid state breaking technologies are essential to achieving operating targets and severe limitations exist with the application of protection methods available within literature for this application. To overcome these shortfalls, novel fault detection approaches are proposed and analysed. These approaches enable fault detection time targets to be met as well as aid with the effective integration of future circuit breaking technologies

Design and implementation of high-radix arithmetic systems based on the SDNR/RNS data representation

This project involved the design and implementation of high-radix arithmetic systems based on the hybrid SDNRIRNS data representation. Some real-time applications require a real-time arithmetic system. An SDNR/RNS arithmetic system provides parallel, real-time processing. The advantages and disadvantages of high-radix SDNR/RNS arithmetic, and the feasibility of implementing SDNR/RNS arithmetic systems in CMOS VLSI technology, were investigated in this project. A common methodological model, which included the stages of analysis, design, implementation, testing, and simulation, was followed. The combination of the SDNR and RNS transforms potential complex logic networks into simpler logic blocks. It was found that when constructing a SDNRIRNS adder, factors such as the radix, digit set, and moduli must be taken into account. There are many avenues still to explore. For example, implementing other arithmetic systems in the same CMOS VLSI technology used in this project and comparing them to equivalent SDNR/RNS systems would provide a set of benchmarks. These benchmarks would be useful in addressing issues relating to relative performance