Applications of Graphene at Microwave Frequencies

In view to the epochal scenarios that nanotechnology discloses, nano-electronics has the potential to introduce a paradigm shift in electronic systems design similar to that of the transition from vacuum tubes to semiconductor devices. Since low dimensional (1D and 2D) nano-structured materials exhibit unprecedented electro-mechanical properties in a wide frequency range, including radio-frequencies (RF), microwave nano-electronics provides an enormous and yet widely undiscovered opportunity for the engineering community. Carbon nano-electronics is one of the main research routes of RF/microwave nano-electronics. In particular, graphene has shown proven results as an emblematic protagonist, and a real solution for a wide variety of microwave electronic devices and circuits. This paper introduces graphene properties in the microwave range, and presents a paradigm of novel graphene-based devices and applications in the microwave/RF frequency range

Low-Dimensional Materials for Disruptive Microwave Antennas Design

This chapter is devoted to a complete analysis of remarkable electromagnetic properties of nanomaterials suitable for antenna design miniaturization. After a review of state of the art mesoscopic scale modeling tools and characterization techniques in microwave domain, new approaches based on wideband material parameters identification (complex permittivity and conductivity) will be described from impedance equivalence formulation achievement by de-embedding techniques applicable in integrated technology or in free space. A focus on performances of 1D materials such as vertically aligned multi-wall carbon nanotube (VA-MWCNT) bundles, from theory to technology, will be presented as a disruptive demonstration for defense and civil applications as in radar systems

Carbon Nanotube Interconnect Modeling for Very Large Scale Integrated Circuits

In this research, we have studied and analyzed the physical and electrical properties of carbon nanotubes. Based on the reported models for current transport behavior in non-ballistic CNT-FETs, we have built a dynamic model for non-ballistic CNT-FETs. We have also extended the surface potential model of a non-ballistic CNT-FET to a ballistic CNT-FET and developed a current transport model for ballistic CNT-FETs. We have studied the current transport in metallic carbon nanotubes. By considering the electron-electron interactions, we have modified two-dimensional fluid model for electron transport to build a semi-classical one-dimensional fluid model to describe the electron transport in carbon nanotubes, which is regarded as one-dimensional system. Besides its accuracy compared with two-dimensional fluid model and Lüttinger liquid theory, one-dimensional fluid model is simple in mathematical modeling and easier to extend for electronic transport modeling of multi-walled carbon nanotubes and single-walled carbon nanotube bundles as interconnections. Based on our reported one-dimensional fluid model, we have calculated the parameters of the transmission line model for the interconnection wires made of single-walled carbon nanotube, multi-walled carbon nanotube and single-walled carbon nanotube bundle. The parameters calculated from these models show close agreements with experiments and other proposed models. We have also implemented these models to study carbon nanotube for on-chip wire inductors and it application in design of LC voltage-controlled oscillators. By using these CNT-FET models and CNT interconnects models, we have studied the behavior of CNT based integrated circuits, such as the inverter, ring oscillator, energy recovery logic; and faults in CNT based circuits

Determination of key device parameters for short- and long-channel Schottky-type carbon nanotube field-effect transistors

The Schottky barrier, contact resistance and carrier mobility in carbon nanotube (CNT) field-effect transistors (FETs) are discussed in detail in this thesis. Novel extraction methods and definitions are proposed for these parameters. A technology comparison with other emerging transistor technologies and a performance projection study are also presented. A Schottky barrier height extraction method for CNTFETs considering one-dimensional (1D) conditions is developed. The methodology is applied to simulation and experimental data of CNTFETs feasible for manufacturing. Y-function-based methods (YFMs) have been applied to simulation and experimental data in order to extract a contact resistance for CNTFETs. Both extraction methods are more efficient and accurate than other conventional approaches. Practical mobility expressions are derived for CNTFETs covering the ballistic as well as the non-ballistic transport regime which enable a straightforward evaluation of the transport in CNTs. They have been applied to simulation and experimental data of devices with different channel lengths and Schottky barrier heights. A comparison of fabricated emerging transistors based on similar criteria for various application scenarios reveals CNTFETs as promising candidates to compete with Si-based technologies in low-power static and dynamic applications. A performance projection study is suggested for specific applications in terms of the studied design parameters

Fault Modeling of Graphene Nanoribbon FET Logic Circuits

[EN] Due to the increasing defect rates in highly scaled complementary metal-oxide-semiconductor (CMOS) devices, and the emergence of alternative nanotechnology devices, reliability challenges are of growing importance. Understanding and controlling the fault mechanisms associated with new materials and structures for both transistors and interconnection is a key issue in novel nanodevices. The graphene nanoribbon field-effect transistor (GNR FET) has revealed itself as a promising technology to design emerging research logic circuits, because of its outstanding potential speed and power properties. This work presents a study of fault causes, mechanisms, and models at the device level, as well as their impact on logic circuits based on GNR FETs. From a literature review of fault causes and mechanisms, fault propagation was analyzed, and fault models were derived for device and logic circuit levels. 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