A neuromorphic silicon photonics nonlinear equalizer for optical communications with intensity modulation and direct detection

We present the design and numerical study of a nonlinear equalizer for optical communications based on silicon photonics and reservoir computing. The proposed equalizer leverages the optical information processing capabilities of integrated photonic reservoirs to combat distortions both in metro links of a few hundred kilometers and in high-speed short-reach intensity-modulation-direct-detection links. We show nonlinear compensation in unrepeated metro links of up to 200 km that outperform electrical feedforward equalizers based equalizers, and ultimately any linear compensation device. For a high-speed short-reach 40Gb/s link based on a distributed feedback laser and an electroabsorptive modulator, and considering a hard decision forward error correction limit of 0.2 x 10(-2), we can increase the reach by almost 10 km. Our equalizer is compact (only 16 nodes) and operates in the optical domain without the need for complex electronic DSP, meaning its performance is not bandwidth constrained. The approach is, therefore, a viable candidate even for equalization techniques far beyond 100G optical communication links

A Comprehensive Workflow for General-Purpose Neural Modeling with Highly Configurable Neuromorphic Hardware Systems

In this paper we present a methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems. We describe in detail a device with 45 million programmable and dynamic synapses that is currently under development, and we sketch the conceptual challenges that arise from taking this platform into operation. More specifically, we aim at the establishment of this neuromorphic system as a flexible and neuroscientifically valuable modeling tool that can be used by non-hardware-experts. We consider various functional aspects to be crucial for this purpose, and we introduce a consistent workflow with detailed descriptions of all involved modules that implement the suggested steps: The integration of the hardware interface into the simulator-independent model description language PyNN; a fully automated translation between the PyNN domain and appropriate hardware configurations; an executable specification of the future neuromorphic system that can be seamlessly integrated into this biology-to-hardware mapping process as a test bench for all software layers and possible hardware design modifications; an evaluation scheme that deploys models from a dedicated benchmark library, compares the results generated by virtual or prototype hardware devices with reference software simulations and analyzes the differences. The integration of these components into one hardware-software workflow provides an ecosystem for ongoing preparative studies that support the hardware design process and represents the basis for the maturity of the model-to-hardware mapping software. The functionality and flexibility of the latter is proven with a variety of experimental results

Analog I/Q FIR filter in 55-nm SiGe BiCMOS for 16-QAM optical communications at 112 Gb/s

We propose a novel implementation of a complex analog equalization filter for the compensation of frequency-dependent variations in coherent optical links. The analog compensation filter can be used in coherent-lite optical communication links where digital signal processing (DSP) is removed to limit the complexity and power consumption. In these links, the filter can compensate for electrical bandwidth limitations and distortion introduced by chromatic dispersion in the fiber. The complex filter is implemented by combining four distributed analog finite-impulse response (FIR) filters to obtain the necessary response. The filter delays are implemented using active delay cell structures to create a compact solution. The analog filter is implemented in a 55-nm BiCMOS technology and consumes 185-mW core power for five complex filter taps. Performance is evaluated using the S-parameter measurements, noise and linearity measurements, and real-time system experiments using 112-Gb/s 16-QAM-modulated signals

Driving the Network-on-Chip Revolution to Remove the Interconnect Bottleneck in Nanoscale Multi-Processor Systems-on-Chip

The sustained demand for faster, more powerful chips has been met by the availability of chip manufacturing processes allowing for the integration of increasing numbers of computation units onto a single die. The resulting outcome, especially in the embedded domain, has often been called SYSTEM-ON-CHIP (SoC) or MULTI-PROCESSOR SYSTEM-ON-CHIP (MP-SoC). MPSoC design brings to the foreground a large number of challenges, one of the most prominent of which is the design of the chip interconnection. With a number of on-chip blocks presently ranging in the tens, and quickly approaching the hundreds, the novel issue of how to best provide on-chip communication resources is clearly felt. NETWORKS-ON-CHIPS (NoCs) are the most comprehensive and scalable answer to this design concern. By bringing large-scale networking concepts to the on-chip domain, they guarantee a structured answer to present and future communication requirements. The point-to-point connection and packet switching paradigms they involve are also of great help in minimizing wiring overhead and physical routing issues. However, as with any technology of recent inception, NoC design is still an evolving discipline. Several main areas of interest require deep investigation for NoCs to become viable solutions: • The design of the NoC architecture needs to strike the best tradeoff among performance, features and the tight area and power constraints of the onchip domain. • Simulation and verification infrastructure must be put in place to explore, validate and optimize the NoC performance. • NoCs offer a huge design space, thanks to their extreme customizability in terms of topology and architectural parameters. Design tools are needed to prune this space and pick the best solutions. • Even more so given their global, distributed nature, it is essential to evaluate the physical implementation of NoCs to evaluate their suitability for next-generation designs and their area and power costs. This dissertation performs a design space exploration of network-on-chip architectures, in order to point-out the trade-offs associated with the design of each individual network building blocks and with the design of network topology overall. The design space exploration is preceded by a comparative analysis of state-of-the-art interconnect fabrics with themselves and with early networkon- chip prototypes. The ultimate objective is to point out the key advantages that NoC realizations provide with respect to state-of-the-art communication infrastructures and to point out the challenges that lie ahead in order to make this new interconnect technology come true. Among these latter, technologyrelated challenges are emerging that call for dedicated design techniques at all levels of the design hierarchy. In particular, leakage power dissipation, containment of process variations and of their effects. The achievement of the above objectives was enabled by means of a NoC simulation environment for cycleaccurate modelling and simulation and by means of a back-end facility for the study of NoC physical implementation effects. Overall, all the results provided by this work have been validated on actual silicon layout

Convergence of millimeter-wave and photonic interconnect systems for very-high-throughput digital communication applications

In the past, radio-frequency signals were commonly used for low-speed wireless electronic systems, and optical signals were used for multi-gigabit wired communication systems. However, as the emergence of new millimeter-wave technology introduces multi-gigabit transmission over a wireless radio-frequency channel, the borderline between radio-frequency and optical systems becomes blurred. As a result, there come ample opportunities to design and develop next-generation broadband systems to combine the advantages of these two technologies to overcome inherent limitations of various broadband end-to-end interconnect systems in signal generation, recovery, synchronization, and so on. For the transmission distances of a few centimeters to thousands of kilometers, the convergence of radio-frequency electronics and optics to build radio-over-fiber systems ushers in a new era of research for the upcoming very-high-throughput broadband services. Radio-over-fiber systems are believed to be the most promising solution to the backhaul transmission of the millimeter-wave wireless access networks, especially for the license-free, very-high-throughput 60-GHz band. Adopting radio-over-fiber systems in access or in-building networks can greatly extend the 60-GHz signal reach by using ultra-low loss optical fibers. However, such high frequency is difficult to generate in a straightforward way. In this dissertation, the novel techniques of homodyne and heterodyne optical-carrier suppressions for radio-over-fiber systems are investigated and various system architectures are designed to overcome these limitations of 60-GHz wireless access networks, bringing the popularization of multi-gigabit wireless networks to become closer to the reality. In addition to the advantages for the access networks, extremely high spectral efficiency, which is the most important parameter for long-haul networks, can be achieved by radio-over-fiber signal generation. As a result, the transmission performance of spectrally efficient radio-over-fiber signaling, including orthogonal frequency division multiplexing and orthogonal wavelength division multiplexing, is broadly and deeply investigated. On the other hand, radio-over-fiber is also used for the frequency synchronization that can resolve the performance limitation of wireless interconnect systems. A novel wireless interconnects assisted by radio-over-fiber subsystems is proposed in this dissertation. In conclusion, multiple advantageous facets of radio-over-fiber systems can be found in various levels of end-to-end interconnect systems. The rapid development of radio-over-fiber systems will quickly change the conventional appearance of modern communications.PhDCommittee Chair: Gee-Kung Chang; Committee Member: Bernard Kippelen; Committee Member: Shyh-Chiang Shen; Committee Member: Thomas K. Gaylord; Committee Member: Umakishore Ramachandra