Combined Time and Information Redundancy for SEU-Tolerance in Energy-Efficient Real-Time Systems

Recently the trade-off between energy consumption and fault-tolerance in real-time systems has been highlighted. These works have focused on dynamic voltage scaling (DVS) to reduce dynamic energy dissipation and on time redundancy to achieve transient-fault tolerance. While the time redundancy technique exploits the available slack time to increase the fault-tolerance by performing recovery executions, DVS exploits slack time to save energy. Therefore we believe there is a resource conflict between the time-redundancy technique and DVS. The first aim of this paper is to propose the usage of information redundancy to solve this problem. We demonstrate through analytical and experimental studies that it is possible to achieve both higher transient fault-tolerance (tolerance to single event upsets (SEU)) and less energy using a combination of information and time redundancy when compared with using time redundancy alone. The second aim of this paper is to analyze the interplay of transient-fault tolerance (SEU-tolerance) and adaptive body biasing (ABB) used to reduce static leakage energy, which has not been addressed in previous studies. We show that the same technique (i.e. the combination of time and information redundancy) is applicable to ABB-enabled systems and provides more advantages than time redundancy alone

Low-energy standby-sparing for hard real-time systems

Time-redundancy techniques are commonly used in real-time systems to achieve fault tolerance without incurring high energy overhead. However, reliability requirements of hard real-time systems that are used in safety-critical applications are so stringent that time-redundancy techniques are sometimes unable to achieve them. Standby sparing as a hardwareredundancy technique can be used to meet high reliability requirements of safety-critical applications. However, conventional standby-sparing techniques are not suitable for lowenergy hard real-time systems as they either impose considerable energy overheads or are not proper for hard timing constraints. In this paper we provide a technique to use standby sparing for hard real-time systems with limited energy budgets. The principal contribution of this work is an online energymanagement technique which is specifically developed for standby-sparing systems that are used in hard real-time applications. This technique operates at runtime and exploits dynamic slacks to reduce the energy consumption while guaranteeing hard deadlines. We compared the low-energy standby-sparing (LESS) system with a low-energy timeredundancy system (from a previous work). The results show that for relaxed time constraints, the LESS system is more reliable and provides about 26% energy saving as compared to the time-redundancy system. For tight deadlines when the timeredundancy system is not sufficiently reliable (for safety-critical application), the LESS system preserves its reliability but with about 49% more energy consumptio

Experimental Study under Real-World Conditions to Develop Fault Detection for Automated Vehicles

Abstract Automated vehicles can contribute to the improvement of transportation through their high capacity, increased safety, low emission and high efficiency. However, unstable conditions of automated mobile systems, which include automated vehicles and mobile robots) can cause serious problems, andthus, automated mobile system requiresto be highly reliable. The objective of this research is to develop on analgorith mfor detection faults (unstable condition) in an automated mobile system and to improve the overall reliability of this system. In this study, we in itially stored and updated a few patterns of data constellations under normal and unstable conditions for fault identification through real-world experiments. Multiple experiments were performed in a public urban area (with course distance per set beingapproximately1.1[km]), where several pedestrians, bicycles, and other robots were also present. The method used for detecting faults utilizes Mahalanobis distance, correlat ion coefficient, and linearization in order to enhance the accuracy of detecting faults;further, because real-world experimental conditions vary frequently,it is essential for the proposed method to be robust undervarious conditions. The ma in feature of this study is that it involves the use of experimental results obtained under real-world conditions, to develop a fault detection algorithm and evaluate its validity. In addition, simu lations were performed using the real-world experimental data, wh ich includes newly logged experimental data after the algorithm was developed in order to evaluate the validity of the proposed algorithm. The simulat ion results show that the proposed algorithm detects faults accurately, thus, they prove its validity

Providing Integrity in Real-Time Networks-on-Chip

Mixed-critical real-time systems must meet strict integrity, resilience and timing constraints, as specified by safety standards. Due to the increasing threat of random hardware faults, efficiently achieving high reliability and dependability calls for cross-layer fault-tolerance solutions. This work introduces the Advanced Integrity Q-service (AIQ), a mechanism to ensure the integrity and predictability of on-Chip communication under random hardware faults. Devised for cross-layer and hierarchical fault-tolerance solutions, AIQ realizes low-overhead error detection in hardware and delegates error handling to arbitrary strategies in software. Experimental evaluation featuring benchmark applications and an industrial avionics use case shows that AIQ operates with high reliability and availability and low hardware and performance overheads. In a many-core mixed-critical platform under expected real-time scenarios, AIQ performs with execution time overhead between 1.4% and 7.1%

Tolerisanje grešaka i energetska efikasnost kod sistema za rad u realnom vremenu sa vremenskom redundansom

The concept of real-time systems (RTSs) is presented in the computer science for decades. During that period, the RTSs have evolved from special purpose microcomputer systems for industrial application to various forms of embedded system that are deeply ingrained in wide segments of daily life. The new application domains pose new design requirements and goals to RTSs, which are now often required to provide both fault tolerance and energy efficiency in addition to their main objective to compute and deliver correct results within a specified period of time. There is a fundamental tradeoff between these two additional requirements because fault tolerance techniques use slack time to improve reliability while low energy consumption techniques exploits slack time to increase energy efficiency. The central problem considered in the dissertation is how to optimally distribute the slack time between these techniques. Dynamic voltage scaling (DVS) is known as one of the most effective low-energy technique for RTSs. However, most existing DVS techniques only focus on minimizing energy consumption without taking the fault-tolerant capability of RTSs into account. In order to solve specify problem in this dissertation, a new heuristic-based fault-tolerant dynamic voltage and frequency scaling (FT-DVFS) algorithm is developed. The goal of the proposed algorithm is to minimize the amount of energy consumed by a real-time system under fault tolerance constraints while guaranteeing that all real-time tasks can complete successfully before their deadlines. Basically, the FT-DVFS is a DVS algorithm with integrated response time analysis (RTA) to check both the schedulability and the fault tolerant constraints of real-time task sets. The performances of FT-DVFS algorithm are evaluated by simulation in a custom build simulator. The simulation results are analyzed from three different points of view: the schedulability, the energy consumption, and the fault tolerance. The simulation results show that the proposed algorithm saves a significant amount of energy even with only two frequency/voltage levels, and the savings further increases with the increase of the number of frequency levels. Also, the simulations show that the reduction in power consumption, which can be achieved with FT-DVFS algorithm decreases with the increase of the processor utilization factor (i.e. processor spare time). The simulation results from the fault tolerant point of view show that the higher level of fault tolerance can only be attained through sacrificing a part of savings in power consumption, and vice versa. The proposed heuristic FT-DVFS algorithm is compared with the optimal DVS algorithm. The simulation analysis show that FT-DVFS algorithm achieves near-optimal solutions in very short computation time even for large task sets

Applying patterns in embedded systems design for managing quality attributes and their trade-offs

Embedded systems comprise one of the most important types of software-intensive systems, as they are pervasive and used in daily life more than any other type, e.g., in cars or in electrical appliances. When these systems operate under hard constraints, the violation of which can lead to catastrophic events, the system is classified as a critical embedded system (CES). The quality attributes related to these hard constraints are named critical quality attributes (CQAs). For example, the performance of the software for cruise-control or self-driving in a car are critical as they can potentially relate to harming human lives. Despite the growing body of knowledge on engineering CESs, there is still a lack of approaches that can support its design, while managing CQAs and their trade-offs with noncritical ones (e.g., maintainability and reusability). To address this gap, the state-of-research and practice on designing CES and managing quality trade-offs were explored, approaches to improve its design identified, and the merit of these approaches empirically investigated. When designing software, one common approach is to organize its components according to well-known structures, named design patterns. However, these patterns may be avoided in some classes of systems such as CES, as they are sometimes associated with the detriment of CQAs. In short, the findings reported in the thesis suggest that, when applicable, design patterns can promote CQAs while supporting the management of trade-offs. The thesis also reports on a phenomena, namely pattern grime, and factors that can influence the extent of the observed benefits