DESIGN OF LOW-POWER LOW-VOLTAGE SUCCESSIVE-APPROXIMATION ANALOG-TO-DIGITAL CONVERTERS

Ph.DDOCTOR OF PHILOSOPH

An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.Includes bibliographical references (p. 79-83).Ultra-wideband (UWB) communications is currently being explored as a medium for high-data-rate last-meter wireless links. Accordingly, there has been much interest in integrating UWB radios onto battery-operated devices, creating a strong demand for energy efficient UWB systems. The objective of this work is to describe how operating the digital baseband processor in the sub-threshold region and increasing the degree of parallelism can translate into energy savings across the entire UWB receiver. While sub-threshold operation is traditionally used for low energy, low performance applications such as wrist-watches, this work examines how sub-threshold operation can be applied to low energy, high performance applications. Simulation results for a 100-Mbps UWB baseband processor using the digital logic cell library of a 90-nm process are presented.by Vivienne Sze.S.M

Time interleaved counter analog to digital converters

The work explores extending time interleaving in A/D converters, by applying a high-level of parallelism to one of the slowest and simplest types of data-converters, the counter ADC. The motivation for the work is to realise high-performance re-configurable A/D converters for use in multi-standard and multi-PHY communication receivers with signal bandwidths in the 10s to 100s of MHz. The counter ADC requires only a comparator, a ramp signal, and a digital counter, where the comparator compares the sampled input against all possible quantisation levels sequentially. This work explores arranging counter ADCs in large time-interleaved arrays, building a Time Interleaved Counter (TIC) ADC. The key to realising a TIC ADC is distributed sampling and a global multi-phase ramp generator realised with a novel figure-of-8 rotating resistor ring. Furthermore Counter ADCs allow for re-configurability between effective sampling rate and resolution due to their sequential comparison of reference levels in conversion. A prototype TIC ADC of 128-channels was fabricated and measured in 0.13μm CMOS technology, where the same block can be configured to operate as a 7-bit 1GS/s, 8-bit 500MS/s, or 9-bit 250MS/s dataconverter. The ADC achieves a sub 400fJ/step FOM in all modes of configuration

Radio Communications

In the last decades the restless evolution of information and communication technologies (ICT) brought to a deep transformation of our habits. The growth of the Internet and the advances in hardware and software implementations modified our way to communicate and to share information. In this book, an overview of the major issues faced today by researchers in the field of radio communications is given through 35 high quality chapters written by specialists working in universities and research centers all over the world. Various aspects will be deeply discussed: channel modeling, beamforming, multiple antennas, cooperative networks, opportunistic scheduling, advanced admission control, handover management, systems performance assessment, routing issues in mobility conditions, localization, web security. Advanced techniques for the radio resource management will be discussed both in single and multiple radio technologies; either in infrastructure, mesh or ad hoc networks