12,967 research outputs found
Hierarchical Models for Relational Event Sequences
Interaction within small groups can often be represented as a sequence of
events, where each event involves a sender and a recipient. Recent methods for
modeling network data in continuous time model the rate at which individuals
interact conditioned on the previous history of events as well as actor
covariates. We present a hierarchical extension for modeling multiple such
sequences, facilitating inferences about event-level dynamics and their
variation across sequences. The hierarchical approach allows one to share
information across sequences in a principled manner---we illustrate the
efficacy of such sharing through a set of prediction experiments. After
discussing methods for adequacy checking and model selection for this class of
models, the method is illustrated with an analysis of high school classroom
dynamics
How (Un)Fair are the ABR Binary Schemes, Actually?
It is well known that a simple binary feedback rate--based congestion avoidance scheme cannot ensure a fairness goal of the Available Bit Rate (ABR) service, namely, max--min fairness. In this paper we show how the rates are distributed for the network consisting of the binary switches, and end--systems employing an additive--increase/multiplicative decrease rate control. The modeling assumptions fairly resembles the ABR congestion avoidance, and applies to an arbitrary network topology. The results are obtained on the basis of a stochastic modeling, upon which we obtain certain analytical results, and conduct a numerical simulation. We validate the stochastic modeling through a discrete--event simulation. We believe that modeling presented in this paper enlight the performance issues of the binary ABR schemes. Keywords ABR, ATM, congestion control, binary scheme, EFCI, fairness, max--min, proportional fairness, stochastic approximation, ODE, Lyapunov, Runge-Kutta
Analysis-of-marginal-Tail-Means (ATM): a robust method for discrete black-box optimization
We present a new method, called Analysis-of-marginal-Tail-Means (ATM), for
effective robust optimization of discrete black-box problems. ATM has important
applications to many real-world engineering problems (e.g., manufacturing
optimization, product design, molecular engineering), where the objective to
optimize is black-box and expensive, and the design space is inherently
discrete. One weakness of existing methods is that they are not robust: these
methods perform well under certain assumptions, but yield poor results when
such assumptions (which are difficult to verify in black-box problems) are
violated. ATM addresses this via the use of marginal tail means for
optimization, which combines both rank-based and model-based methods. The
trade-off between rank- and model-based optimization is tuned by first
identifying important main effects and interactions, then finding a good
compromise which best exploits additive structure. By adaptively tuning this
trade-off from data, ATM provides improved robust optimization over existing
methods, particularly in problems with (i) a large number of factors, (ii)
unordered factors, or (iii) experimental noise. We demonstrate the
effectiveness of ATM in simulations and in two real-world engineering problems:
the first on robust parameter design of a circular piston, and the second on
product family design of a thermistor network
An acceleration simulation method for power law priority traffic
A method for accelerated simulation for simulated self-similar processes is proposed. This technique simplifies
the simulation model and improves the efficiency by using excess packets instead of packet-by-packet source traffic for a FIFO and non-FIFO buffer scheduler. In this research is focusing on developing an equivalent model of the conventional packet buffer that can produce an output analysis (which in this case will be the steady state probability) much faster. This acceleration simulation method is a further development of the Traffic Aggregation technique, which had previously been applied to FIFO buffers only and applies the Generalized Ballot Theorem to calculate the waiting time for the low priority traffic (combined with prior work on traffic aggregation). This hybrid method is shown to provide a significant reduction in the process time, while maintaining queuing behavior in the buffer that is highly accurate when compared to results from a conventional simulatio
Techniques for the Fast Simulation of Models of Highly dependable Systems
With the ever-increasing complexity and requirements of highly dependable systems, their evaluation during design and operation is becoming more crucial. Realistic models of such systems are often not amenable to analysis using conventional analytic or numerical methods. Therefore, analysts and designers turn to simulation to evaluate these models. However, accurate estimation of dependability measures of these models requires that the simulation frequently observes system failures, which are rare events in highly dependable systems. This renders ordinary Simulation impractical for evaluating such systems. To overcome this problem, simulation techniques based on importance sampling have been developed, and are very effective in certain settings. When importance sampling works well, simulation run lengths can be reduced by several orders of magnitude when estimating transient as well as steady-state dependability measures. This paper reviews some of the importance-sampling techniques that have been developed in recent years to estimate dependability measures efficiently in Markov and nonMarkov models of highly dependable system
A time dependent performance model for multihop wireless networks with CBR traffic
In this paper, we develop a performance modeling technique for analyzing the time varying network layer queueing behavior of multihop wireless networks with constant bit rate traffic. Our approach is a hybrid of fluid flow queueing modeling and a time varying connectivity matrix. Network queues are modeled using fluid-flow based differential equation models which are solved using numerical methods, while node mobility is modeled using deterministic or stochastic modeling of adjacency matrix elements. Numerical and simulation experiments show that the new approach can provide reasonably accurate results with significant improvements in the computation time compared to standard simulation tools. © 2010 IEEE
Influence of Input/output Operations on Processor Performance
Nowadays, computers are frequently equipped with peripherals that transfer great
amounts of data between them and the system memory using direct memory access
techniques (i.e., digital cameras, high speed networks, . . . ). Those peripherals prevent the
processor from accessing system memory for significant periods of time (i.e., while they
are communicating with system memory in order to send or receive data blocks). In this
paper we study the negative effects that I/O operations from computer peripherals have on
processor performance. With the help of a set of routines (SMPL) used to make discrete
event simulators, we have developed a configurable software that simulates a computer
processor and main memory as well as the I/O scenarios where the periph-erals operate.
This software has been used to analyze the performance of four different processors in four
I/O scenarios: video capture, video capture and playback, high speed network, and serial
transmission
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