Digitally Programmable Analogue Circuits for Sensor Conditioning Systems

This work presents two current-mode integrated circuits designed for sensor signal preprocessing in embedded systems. The proposed circuits have been designed to provide good signal transfer and fulfill their function, while minimizing the load effects due to building complex conditioning architectures. The processing architecture based on the proposed building blocks can be reconfigured through digital programmability. Thus, sensor useful range can be expanded, changes in the sensor operation can be compensated for and furthermore, undesirable effects such as device mismatching and undesired physical magnitudes sensor sensibilities are reduced. The circuits were integrated using a 0.35 μm standard CMOS process. Experimental measurements, load effects and a study of two different tuning strategies are presented. From these results, system performance is tested in an application which entails extending the linear range of a magneto-resistive sensor. Circuit area, average power consumption and programmability features allow these circuits to be included in embedded sensing systems as a part of the analogue conditioning components

Dependable Digitally-Assisted Mixed-Signal IPs Based on Integrated Self-Test & Self-Calibration

Heterogeneous SoC devices, including sensors, analogue and mixed-signal front-end circuits and the availability of massive digital processing capability, are being increasingly used in safety-critical applications like in the automotive, medical, and the security arena. Already a significant amount of attention has been paid in literature with respect to the dependability of the digital parts in heterogeneous SoCs. This is in contrast to especially the sensors and front-end mixed-signal electronics; these are however particular sensitive to external influences over time and hence determining their dependability. This paper provides an integrated SoC/IP approach to enhance the dependability. It will give an example of a digitally-assisted mixed-signal front-end IP which is being evaluated under its mission profile of an automotive tyre pressure monitoring system. It will be shown how internal monitoring and digitally-controlled adaptation by using embedded processors can help in terms of improving the dependability of this mixed-signal part under harsh conditions for a long time

A CMOS Mixed Mode Non-Linear Processing Unit for Adaptive Sensor Conditioning in Portable Smart Systems

This paper presents the architecture of a novel non-linear digitally programmable analog unit for sensor output conditioning in battery-operated smart systems. Designed in an 180nm 1.8V standard CMOS technology, by properly setting the 6-bit registers in the arithmetic unit, the voltage inputs are weighted before being processed by a non-linear circuit. Thus, a processing system consisting of a set of these devices suitably tuned and interconnected can be applied to condition a non-linear sensor, improving its behavior both in linearity and operating range, while reducing the effects of cross sensitivity. The robustness of the digital weight tuning is tested simulating a chip-on-the-loop training using a Levenberg-Marquardt-based algorithm. Electric simulations of the proposed unit and the results of its application in a complete neural network-based processing system to improve the linear operating range of a thermistor are presented

Analog Reconfigurable Circuits

The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings of electronics, but the universal reconfigurable circuits called Field Programmable Analog Arrays (FPAA) have been developed over the last two decades. This paper presents the classification of analog circuit reconfiguration, examples of FPAA solutions obtained as academic projects and commercially available ones, as well as some application examples of the dynamic reconfiguration of FPAA.

PC-Based Data Acquisition using PCL-208

DAQ (Data AcQuisition) is simply the process of bringing a real-world signal, such as avoltage, into the computer, for processing, analysis, storage or other data manipulation. A Physical phenomena represents the real-world signal you are trying to measure. In order to optimize the characteristics of a system in terms of performance, handling capacity and cost, the relevant subsystem can be combined together. Analog data is generally acquired and transformed into the digital form for the purpose of processing, transmission and display. Rapid advances in Personal Computer (PC) hardware and software technologies have resulted in easy and efficient adoption of PCs in various precise measurement and complex control applications. A PC based measurement or control application requires conversion of real world analog signal into digital format and transfer of digitized data into the PC. A data acquisition system that performs conversion of analog signal to digital data and the digital data to analog signal is interfaced to a pc to implement the functions of a measurement and control instrumentation applications. In this project we have used the electromagnetic sensor to acquire the data of a magnetic disk angular velocity, which we have got in mili volts range. This has been further transformed approximately into the range of 5 volt by using an operational amplifier of suitable gain (~30)and then rectified .We then transformed the analog voltage into digital by using ADC 0804 and the processing part is done by using ATMEL89c51.In the second phase we have used the data acquisition card PCL-208 and 207 to interface the amplified output to PC by the help TURBO C (C compiler)

ACE16K: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCs

Today, with 0.18-μm technologies mature and stable enough for mixed-signal design with a large variety of CMOS compatible optical sensors available and with 0.09-μm technologies knocking at the door of designers, we can face the design of integrated systems, instead of just integrated circuits. In fact, significant progress has been made in the last few years toward the realization of vision systems on chips (VSoCs). Such VSoCs are eventually targeted to integrate within a semiconductor substrate the functions of optical sensing, image processing in space and time, high-level processing, and the control of actuators. The consecutive generations of ACE chips define a roadmap toward flexible VSoCs. These chips consist of arrays of mixed-signal processing elements (PEs) which operate in accordance with single instruction multiple data (SIMD) computing architectures and exhibit the functional features of CNN Universal Machines. They have been conceived to cover the early stages of the visual processing path in a fully-parallel manner, and hence more efficiently than DSP-based systems. Across the different generations, different improvements and modifications have been made looking to converge with the newest discoveries of neurobiologists regarding the behavior of natural retinas. This paper presents considerations pertaining to the design of a member of the third generation of ACE chips, namely to the so-called ACE16k chip. This chip, designed in a 0.35-μm standard CMOS technology, contains about 3.75 million transistors and exhibits peak computing figures of 330 GOPS, 3.6 GOPS/mm2 and 82.5 GOPS/W. Each PE in the array contains a reconfigurable computing kernel capable of calculating linear convolutions on 3×3 neighborhoods in less than 1.5 μs, imagewise Boolean combinations in less than 200 ns, imagewise arithmetic operations in about 5 μs, and CNN-like temporal evolutions with a time constant of about 0.5 μs. Unfortunately, the many ideas underlying the design of this chip cannot be covered in a single paper; hence, this paper is focused on, first, placing the ACE16k in the ACE chip roadmap and, then, discussing the most significant modifications of ACE16K versus its predecessors in the family.LOCUST IST2001—38 097VISTA TIC2003—09 817 - C02—01Office of Naval Research N000 140 210 88

The combined sensor using bridge circuit supplied by current sources for simultaneous measurement of two parameters

This paper describes a new features of resistance bridge supplied by two current sources placed in opposite arms. The possibility to simultaneous measurements of temperature and strain has been achieved by using this technique and it is described with some theoretical considerations. Theory is mentioned along with data to confirm that the temperature and strain gauge resistance changes are sensed without appreciable error. Also the results of an experiment confirm this approach. To complete these considerations the uncertainty of both temperature and strain changes is calculated. Also the possibility to apply this technique in biomechanics is discusse

Developing large-scale field-programmable analog arrays for rapid prototyping

Field-programmable analog arrays (FPAAs) provide a method for rapidly prototyping analog systems. While currently available FPAAs vary in architecture and interconnect design, they are often limited in size and flexibility. For FPAAs to be as useful and marketable as modern digital reconfigurable devices, new technologies must be explored to provide area efficient, accurately programmable analog circuitry that can be easily integrated into a larger digital/mixed signal system. By leveraging recent advances in floating gate transistors, a new generation of FPAAs are achievable that will dramatically advance the current state of the art in terms of size, functionality, and flexibility