Key Issues in the Analysis of Remote Sensing Data: A report on the workshop

The procedures of a workshop assessing the state of the art of machine analysis of remotely sensed data are summarized. Areas discussed were: data bases, image registration, image preprocessing operations, map oriented considerations, advanced digital systems, artificial intelligence methods, image classification, and improved classifier training. Recommendations of areas for further research are presented

JPEG steganography with particle swarm optimization accelerated by AVX

Digital steganography aims at hiding secret messages in digital data transmitted over insecure channels. The JPEG format is prevalent in digital communication, and images are often used as cover objects in digital steganography. Optimization methods can improve the properties of images with embedded secret but introduce additional computational complexity to their processing. AVX instructions available in modern CPUs are, in this work, used to accelerate data parallel operations that are part of image steganography with advanced optimizations.Web of Science328art. no. e544

TM digital image products for applications

The image characteristics of digital data generated by LANDSAT 4 thematic mapper (TM) are discussed. Digital data from the TM resides in tape files at various stages of image processing. Within each image data file, the image lines are blocked by a factor of either 5 for a computer compatible tape CCT-BT, or 4 for a CCT-AT and CCT-PT; in each format, the image file has a different format. Nominal geometric corrections which provide proper geodetic relationships between different parts of the image are available only for the CCT-PT. It is concluded that detector 3 of band 5 on the TM does not respond; this channel of data needs replacement. The empty bin phenomenon in CCT-AT images results from integer truncations of mixed-mode arithmetric operations

Digital image processing using mathematical morphology

This dissertation is a natural extension of my undergraduate research project entitled, Digital Image Processing”. Whilst my undergraduate project dealt with a number of classical digital image filtering techniques such as spatial convolution and frequency domain filtering via the Fourier transform, this dissertation focuses on an alternative approach employing Mathematical Morphology. In contrast to classical filtering techniques, which often geometrically distort the original image, morphological operations, used sensibly, essentially preserve shape and geometry. Mathematical morphology therefore lends itself to image processing applications requiring the identification of objects and object features within an image. Herein basic morphological operations are developed, firstly within the continuous image domain (Euclidean N-space, Rn), and then in the digital domain (Zn). Particular emphasis is placed on the development of digital morphological operators for both binary and grey-tone images, progressing from the rudimentary operations of dilation and erosion to granulometry and topological processing. Subsequent to the development of the theory, a case study is presented. The case study describes a preliminary investigation into the application of morphological operations to photomicrographs of mouse adrenal cortex cells with the aim of identifying specific cell features

Microchannel spatial light modulator

The Microchannel Spatial Light Modulator (MSLM), a versatile, highly sensitive, and optically addressed device being developed for real time optical information processing is discussed. The MSLM operates by converting an input optical image into a charge distribution at the surface of an electro-optic crystal. The charge distribution generates an electric field which modulates the refractive index of the crystal and thereby the phase or intensity of an image readout beam. Prototype devices employing 250 micron thick crystals exhibited a spatial resolution of 5 cycles/mm at 50% contrast, an exposure sensitivity of 2.2 nJ/cu cm and framing rates of 40 Hz with full modulation depth. The image processing operations that have been achieved using the internal processing mode of the MSLM include contrast reversal, contrast enhancement, edge enhancement, image addition and subtraction, analog and digital intensity thresholding, and binary level logic operations such as AND, OR, EXCLUSIVE OR, and NOR

A reconfigurable real-time morphological system for augmented vision

There is a significant number of visually impaired individuals who suffer sensitivity loss to high spatial frequencies, for whom current optical devices are limited in degree of visual aid and practical application. Digital image and video processing offers a variety of effective visual enhancement methods that can be utilised to obtain a practical augmented vision head-mounted display device. The high spatial frequencies of an image can be extracted by edge detection techniques and overlaid on top of the original image to improve visual perception among the visually impaired. Augmented visual aid devices require highly user-customisable algorithm designs for subjective configuration per task, where current digital image processing visual aids offer very little user-configurable options. This paper presents a highly user-reconfigurable morphological edge enhancement system on field-programmable gate array, where the morphological, internal and external edge gradients can be selected from the presented architecture with specified edge thickness and magnitude. In addition, the morphology architecture supports reconfigurable shape structuring elements and configurable morphological operations. The proposed morphology-based visual enhancement system introduces a high degree of user flexibility in addition to meeting real-time constraints capable of obtaining 93 fps for high-definition image resolution

A mixed-signal early vision chip with embedded image and programming memories and digital I/O

From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS technology. The core processing array has been designed to achieve high-speed of operation and large-enough accuracy (∼ 7bit) with low power consumption. The chip includes on-chip program memory to allow for the execution of complex, sequential and/or bifurcation flow image processing algorithms. It also includes the structures and circuits needed to guarantee its embedding into conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. The chip features up to 330GOPs (Giga Operations per second), and uses the power supply (180GOP/Joule) and the silicon area (3.8 GOPS/mm2) efficiently, as it is able to maintain VGA processing throughputs of 100Frames/s with about 15 basic image processing tasks on each frame