3 research outputs found

    Diseño de una Unidad de Detección del ritmo cardiaco humano para dispositivos médicos

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    Proyecto de Graduación (Licenciatura en Ingeniería Electrónica). Instituto Tecnológico de Costa Rica. Escuela de Ingeniería Electrónica, 2012.In this report was documented the development of a cardiac rhythm Detection Unit for medic devices. With the help of the Dr. Alfonso Chacón, the M.Sc. Roberto Pereira and the Dr. Alfredo Arnaud, a base circuit capable of detecting the cardiac pulses was designed. For the solution, low-power Gm-C circuits and transistor fragmentation technics were implemented as strategies for the design. Afterwards, a computerized optimization tool was employed to improve its electrical properties. In the present document you will find all the information related to the project development, from the theoretical fundaments to the design, the tests and the results obtained in simulators

    Circuitos digitais em modo de corrente

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    Mestrado em Engenharia Electrónica e TelecomunicaçõesEste trabalho de dissertação insere-se na área da electrónica digital, e consiste no projecto, construção e caracterização de circuitos digitais em Modo de Corrente, empregando estratégias de desenho MCML (MOS Current Mode Logic). Circuitos MCML apresentam como principais vantagens um bom compromisso entre o analógico e digital e potência dissipada constante, sendo desta forma uma boa solução para aplicações que exigem altas velocidades de operação. Neste trabalho são abordadas as principais características da lógica MCML relativas ao projecto de circuitos digitais através de uma análise detalhada do inversor MCML. É ainda efectuada uma abordagem sobre as metodologias para implementação/desenho das principais funções lógicas, bem como uma análise comparativa das suas características. Posteriormente implementa-se um conjunto de portas lógicas, analisando as diferentes topologias provenientes do método de implementação adoptado. Para analisar o desempenho de circuitos MCML, projectou-se algumas funções lógicas, em tecnologia CMOS 350nm da AMS, procedendo à sua simulação e caracterização.The present dissertation is inserted in the general subject of digital electronics, and discusses the design, layout and characterization of current-mode digital circuits using MCML design strategies. MCML circuits exhibit major advantages in digital design, like a constant power consumption, and present a good compromise for analog and digital applications. This work addresses the most important characteristics of MCML logic for the design of digital circuitry through a detailed analysis of the MCML inverter. The basic methodologies used for implementation/layout of the most important logical functions are assessed, and a comparative analysis of their characteristics is performed. Further on, the set of logic gates designed in the course of this work is presented, allowing for the analysis of different topologies from the chosen implementation methodology. Finally, in order to analyze the performance of MCML circuits, several logic functions where implemented using the AMS 350nm CMOS technology. The respective characterization and simulation results are presented and discussed

    DESIGN OF A MCML GATE LIBRARY APPLYING MULTIOBJECTIVE OPTIMIZATION

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    In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of each gate that is part of our MCML basic library. A genetic algorithm (GA) is employed to automatically detect this front in a process that efficiently finds optimal parameterizations and their corresponding values in an aggregate fitness space. Measures of the power consumption, propagation delay and output voltage swing are used as fitness functions, since the problem is treated as a multi-objective optimization task. Finally, the results of postlayout simulations, using the AMS 0.35 µm technology are presented. Index Terms — Genetic algorithms, MOS current mode logic (MCML), Multi-objective optimization, Pareto front, design space exploration
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