139,705 research outputs found

    Architecture of a network-in-the-Loop environment for characterizing AC power system behavior

    Get PDF
    This paper describes the method by which a large hardware-in-the-loop environment has been realized for three-phase ac power systems. The environment allows an entire laboratory power-network topology (generators, loads, controls, protection devices, and switches) to be placed in the loop of a large power-network simulation. The system is realized by using a realtime power-network simulator, which interacts with the hardware via the indirect control of a large synchronous generator and by measuring currents flowing from its terminals. These measured currents are injected into the simulation via current sources to close the loop. This paper describes the system architecture and, most importantly, the calibration methodologies which have been developed to overcome measurement and loop latencies. In particular, a new "phase advance" calibration removes the requirement to add unwanted components into the simulated network to compensate for loop delay. The results of early commissioning experiments are demonstrated. The present system performance limits under transient conditions (approximately 0.25 Hz/s and 30 V/s to contain peak phase-and voltage-tracking errors within 5. and 1%) are defined mainly by the controllability of the synchronous generator

    Design and analysis of a control system for an optical delay-line circuit used as reconfigurable gain equalizer

    Get PDF
    The design and analysis of a control system for a coherent two-port lattice-form optical delay-line circuit used as reconfigurable gain equalizer is presented. The design of the control system, which is based on a real device model and a least-square optimization method, is described in detail. Analysis on a five-stage device for the 32 possible solutions of phase parameters showed that, for some filter characteristics, the variations in power dissipation can vary up to a factor of 2. Furthermore, the solution selection has influence on the optimization result and number of iterations needed. A sensitivity analysis of the phase parameters showed that the allowable error in the phase parameters should not exceed a standard deviation of /spl pi//500 in order to achieve a total maximal absolute accuracy error not greater than approximately 0.6 dB. A five-stage device has been fabricated using planar lightwave circuit technology that uses the thermooptic effect. Excellent agreement between simulations and measurements has been achieved

    New contention resolution schemes for WiMAX

    Get PDF
    Abstract—The use of Broadband Wireless Access (BWA) technology is increasing due to the use of Internet and multimedia applications with strict requirements of end–to–end delay and jitter, through wireless devices. The IEEE 802.16 standard, which defines the physical (PHY) and the medium access control (MAC) layers, is one of the BWA standards. Its MAC layer is centralized basis, where the Base Station (BS) is responsible for assigning the needed bandwidth for each Subscriber Station (SS), which requests bandwidth competing between all of them. The standard defines a contention resolution process to resolve the potential occurrence of collisions during the requesting process. In this paper, we propose to modify the contention resolution process to improve the network performance, including end–to–end delay and throughput

    Cross-layer design for single-cell OFDMA systems with heterogeneous QoS and partial CSIT

    Get PDF
    Abstract— This paper proposes a novel cross-layer scheduling scheme for a single-cell orthogonal frequency division multiple access (OFDMA) wireless system with partial channel state information (CSI) at transmitter (CSIT) and heterogeneous user delay requirements. Previous research efforts on OFDMA resource allocation are typically based on the availability of perfect CSI or imperfect CSI but with small error variance. Either case consists to typify a non tangible system as the potential facts of channel feedback delay or large channel estimation errors have not been considered. Thus, to attain a more realistic resolution our cross-layer design determines optimal subcarrier and power allocation policies based on partial CSIT and individual user’s quality of service (QoS) requirements. The simulation results show that the proposed cross-layer scheduler can maximize the system’s throughput and at the same time satisfy heterogeneous delay requirements of various users with significant low power consumption

    Error-constrained filtering for a class of nonlinear time-varying delay systems with non-gaussian noises

    Get PDF
    Copyright [2010] IEEE. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Brunel University's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.In this technical note, the quadratic error-constrained filtering problem is formulated and investigated for discrete time-varying nonlinear systems with state delays and non-Gaussian noises. Both the Lipschitz-like and ellipsoid-bounded nonlinearities are considered. The non-Gaussian noises are assumed to be unknown, bounded, and confined to specified ellipsoidal sets. The aim of the addressed filtering problem is to develop a recursive algorithm based on the semi-definite programme method such that, for the admissible time-delays, nonlinear parameters and external bounded noise disturbances, the quadratic estimation error is not more than a certain optimized upper bound at every time step. The filter parameters are characterized in terms of the solution to a convex optimization problem that can be easily solved by using the semi-definite programme method. A simulation example is exploited to illustrate the effectiveness of the proposed design procedures.This work was supported in part by the Leverhulme Trust of the U.K., the Engineering and Physical Sciences Research Council (EPSRC) of the U.K. under Grant GR/S27658/01, the Royal Society of the U.K., the National Natural Science Foundation of China under Grant 61028008 and Grant 61074016, the Shanghai Natural Science Foundation of China under Grant 10ZR1421200, and the Alexander von Humboldt Foundation of Germany. Recommended by Associate Editor E. Fabre

    Robust H∞ filtering for markovian jump systems with randomly occurring nonlinearities and sensor saturation: The finite-horizon case

    Get PDF
    This article is posted with the permission of IEEE - Copyright @ 2011 IEEEThis paper addresses the robust H∞ filtering problem for a class of discrete time-varying Markovian jump systems with randomly occurring nonlinearities and sensor saturation. Two kinds of transition probability matrices for the Markovian process are considered, namely, the one with polytopic uncertainties and the one with partially unknown entries. The nonlinear disturbances are assumed to occur randomly according to stochastic variables satisfying the Bernoulli distributions. The main purpose of this paper is to design a robust filter, over a given finite-horizon, such that the H∞ disturbance attenuation level is guaranteed for the time-varying Markovian jump systems in the presence of both the randomly occurring nonlinearities and the sensor saturation. Sufficient conditions are established for the existence of the desired filter satisfying the H∞ performance constraint in terms of a set of recursive linear matrix inequalities. Simulation results demonstrate the effectiveness of the developed filter design scheme.This work was supported in part by the National Natural Science Foundation of China under Grants 61028008, 60825303, and 61004067, National 973 Project under Grant 2009CB320600, the Key Laboratory of Integrated Automation for the Process Industry (Northeastern University) from the Ministry of Education of China, the Engineering and Physical Sciences Research Council (EPSRC) of the U.K., under Grant GR/S27658/01, the Royal Society of the U.K., and the Alexander von Humboldt Foundation of Germany

    A selective delayed channel access (SDCA) for the high-throughput IEEE 802.11n

    Get PDF
    Abstract— In this paper we investigate the potential benefits of a selective delayed channel access algorithm (SDCA) for the future IEEE 802.11n based high-throughput networks. The proposed solution aims to resolve the poor channel utilization and the low efficiency that EDCA’s high priority stations adhere due to shorter waiting times and consequently to the network’s degrading overall end performance. The algorithm functions at the MAC level where it delays the packets from being transmitted by postponing the channel access request, based on their traffic characteristics. As a result, the flow’s average aggregate size increases and consequently so is the channel efficiency. However, in some situations we notice that further deferring has a negative impact with TCP applications, thus we further introduce a traffic awareness feature that allows the algorithm to distinguish which flows are using the TCP protocol and override any additional MAC delay. We validate through various simulations that SDCA improves throughput significantly and maximizes channel utilization
    • 

    corecore