6 research outputs found
Effect of CMOS Technology Scaling on Fully-Integrated Power Supply Efficiency
International audienceIntegrating a power supply in the same die as the powered circuits is an appropriate solution for granular, fine and fast power management. To allow same-die co-integration, fully integrated DC-DC converters designed in the latest CMOS technologies have been greatly studied by academics and industrialists in the last decade. However, there is little study concerning the effects of the CMOS scaling on these particular circuits. To show the trends, this paper compares the achievable efficiencies of the 2:1 switched capacitor DC-DC converter topology under the same constraints in 65, 130 and 350nm bulk CMOS nodes and 28nm in bulk and FDSOI technologies with various capacitor options
Area- and Energy- Efficient Modular Circuit Architecture for 1,024-Channel Parallel Neural Recording Microsystem.
This research focuses to develop system architectures and associated electronic circuits for a next generation neuroscience research tool, a massive-parallel neural recording system capable of recording 1,024 channels simultaneously. Three interdependent prototypes have been developed to address major challenges in realization of the massive-parallel neural recording microsystems: minimization of energy and area consumption while preserving high quality in recordings.
First, a modular 128-channel Δ-ΔΣ AFE using the spectrum shaping has been designed and fabricated to propose an area-and energy efficient solution for neural recording AFEs. The AFE achieved 4.84 fJ/C−s·mm2 figure of merit that is the smallest the area-energy product among the state-of-the-art multichannel neural recording systems. It also features power and area consumption of 3.05 µW and 0.05 mm2 per channel, respectively while exhibiting 63.3 dB signal-to-noise ratio with 3.02 µVrms input referred noise.
Second, an on-chip mixed signal neural signal compressor was built to reduce the energy consumption in handling and transmission of the recorded data since this occupies a large portion of the total energy consumption as the number of parallel recording increases. The compressor reduces the data rates of two distinct groups of neural signals that are essential for neuroscience research: LFP and AP without loss of informative signals. As a result, the power consumptions for the data handling and transmissions of the LFP and AP were reduced to about 1/5.35 and 1/10.54 of the uncompressed cases, respectively. In the total data handling and transmission, the measured power consumption per channel is 11.98 µW that is about 1/9 of 107.5 µW without the compression.
Third, a compact on-chip dc-to-dc converter with constant 1 MHz switching frequency has been developed to provide reliable power supplies and enhance energy delivery efficiency to the massive-parallel neural recording systems. The dc-to-dc converter has only predictable tones at the output and it exhibits > 80% power conversion efficiency at ultra-light loads, < 100 µW that is relevant power most of the multi-channel neural recording systems consume. The dc-to-dc converter occupies 0.375 mm2 of area which is less than 1/20 of the area the first prototype consumes (8.64 mm2).PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/133244/1/sungyun_1.pd
An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects
This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies
WIRELESS POWER MANAGEMENT CIRCUITS FOR BIOMEDICAL IMPLANTABLE SYSTEMS
Ph.DDOCTOR OF PHILOSOPH
Power delivery mechanisms for asynchronous loads in energy harvesting systems
PhD ThesisFor systems depending on methods, a fundamental
contradiction in the power delivery chain has existed between conventional
to supply it. DC/DC conversion (e.g.)
has therefore been an integral part of such systems to resolve this contradiction.
be made tolerant to a much wider range of Vdd variance. This may open up
opportunities for much more energy efficient methods of power delivery.
performance of different power delivery mechanisms driving both asynchronous
and synchronous loads directly from a harvester source bypassing bulky energy
method, which employs a
energy from a EH circuit depending on load and source conditions, is developed.
through comprehensive comparative analysis.
Based on the novel CBB power delivery method, an asynchronous controller is
circuits to work with tasks. The successful asynchronous control design drives a
case study that is meant to explore relations between power path and task path.
To deal with different tasks with variable harvested power, systems may have a
range of operation conditions and thus dynamically call for CBB or SCC type power
set of capacitors to form CBB or SCC is implemented with economic system size.
This work presents an unconventional way of designing a compact-size, quick-
circuit
overcome large voltage variation in EH systems and implement smart power
management for harsh EH environment. The power delivery mechanisms (SCC,
employed to help asynchronous-
logic-based chip testing and micro-scale EH system demonstrations
Neue Methodik zur Optimierung der Energieeffizienz des Künstlichen Akkommodationssystems
Das Künstliche Akkommodationssystem ist ein neuer Ansatz zur Wiederherstellung der Akkommodationsfähigkeit des menschlichen Auges. Das hochintegrierte, gekapselte Mikrosystem soll autonom die Funktion der natürlichen Linse übernehmen. Das Ziel der Arbeit besteht darin, eine neue Methodik zur Optimierung der Energieeffizienz des Künstlichen Akkommodationssystems zu entwickeln. Dazu werden Konzepte zur Optimierung der Spannungswandlung sowie Konzepte zur Reduktion der Leistungsaufnahme und zur Verlängerung der autonomen Betriebsdauer des Implantats vorgestellt