Data-driven interpolation of dynamical systems with delay

We present a data-driven realization for systems with delay, which generalizes the Loewner framework. The realization is obtained with low computational cost directly from measured data of the transfer function. The internal delay is estimated by solving a least-square optimization over some sample data. Our approach is validated by several examples, which indicate the need for preserving the delay structure in the reduced model.DFG, SFB 1029, Substantial efficiency increase in gas turbines through direct use of coupled unsteady combustion and flow dynamic

Model reduction by matching the steady-state response of explicit signal generators

© 2015 IEEE.Model reduction by moment matching for interpolation signals which do not have an implicit model, i.e., they do not satisfy a differential equation, is considered. Particular attention is devoted to discontinuous, possibly periodic, signals. The notion of moment is reformulated using an integral matrix equation. It is shown that, under specific conditions, the new definition and the one based on the Sylvester equation are equivalent. New parameterized families of models achieving moment matching are given. The results are illustrated by means of a numerical example

Neuro-fuzzy chip to handle complex tasks with analog performance

This paper presents a mixed-signal neuro-fuzzy controller chip which, in terms of power consumption, input–output delay, and precision, performs as a fully analog implementation. However, it has much larger complexity than its purely analog counterparts. This combination of performance and complexity is achieved through the use of a mixed-signal architecture consisting of a programmable analog core of reduced complexity, and a strategy, and the associated mixed-signal circuitry, to cover the whole input space through the dynamic programming of this core. Since errors and delays are proportional to the reduced number of fuzzy rules included in the analog core, they are much smaller than in the case where the whole rule set is implemented by analog circuitry. Also, the area and the power consumption of the new architecture are smaller than those of its purely analog counterparts simply because most rules are implemented through programming. The Paper presents a set of building blocks associated to this architecture, and gives results for an exemplary prototype. This prototype, called multiplexing fuzzy controller (MFCON), has been realized in a CMOS 0.7 um standard technology. It has two inputs, implements 64 rules, and features 500 ns of input to output delay with 16-mW of power consumption. Results from the chip in a control application with a dc motor are also provided