7,712 research outputs found

    Continuous processing of images through user sketched functional blocks

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    Ankara : The Department of Computer Engineering and Information Sciences and the Institute of Engineering and Sciences of Bilkent Univ. , 1988.Thesis (Master's) -- Bilkent University, 1988.Includes bibliographical references leaves 59.An object oriented user interface is developed for interacting with and processing images. The software prepared for this purpose includes image processing functions as well as user friendly interaction tools both of a lower level such as menus, panels, windows and a higher level such as a schematics. The lower level utilities provide direct interface with the available image processing functions. At the higher level, the nodes of the schematics serve as image processing function instantiations and the arcs are the paths through which processed images flow. By constructing such a schematics, a complex set of operations can be applied to images continuously.Kaya, AydınM.S

    Continuous processing of images through user sketched functional blocks

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    Our aim is to implement an image processing system with previously defined algorithms through the use of functional blocks connected together to form a diagram that we call a schematic. A functional block means the representation of a routine or function by a visual object in our intent. The arc connecting two blocks is the path and direction through which an image is transferred. In the development of the system we relied on the usage of new developments in software providing for the construction of better interfaces. Most important of these are the object oriented style of programming, iconic interfacing, multiple window and multi-tasking operating systems

    ACE16K: A 128×128 focal plane analog processor with digital I/O

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    This paper presents a new generation 128×128 focal-plane analog programmable array processor (FPAPAP), from a system level perspective, which has been manufactured in a 0.35 ÎŒm standard digital 1P-5M CMOS technology. The chip has been designed to achieve the high-speed and moderate-accuracy (8b) requirements of most real time early-vision processing applications. It is easily embedded in conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four millions transistors, 90% of them working in analog mode, and exhibits a relatively low power consumption-<4 W, i.e. less than 1 ÎŒW per transistor. Computing vs. power peak values are in the order of 1 TeraOPS/W, while maintained VGA processing throughputs of 100 frames/s are possible with about 10-20 basic image processing tasks on each frame

    Real-time near replica detection over massive streams of shared photos

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    Aquest treball es basa en la detecciĂł en temps real de repliques d'imatges en entorns distribuĂŻts a partir de la indexaciĂł de vectors de caracterĂ­stiques locals

    EZEL:a Visual Tool for Performance Assessment of Peer-to-Peer File-Sharing Networks

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    EZEL:a Visual Tool for Performance Assessment of Peer-to-Peer File-Sharing Networks

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    The Design of a System Architecture for Mobile Multimedia Computers

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    This chapter discusses the system architecture of a portable computer, called Mobile Digital Companion, which provides support for handling multimedia applications energy efficiently. Because battery life is limited and battery weight is an important factor for the size and the weight of the Mobile Digital Companion, energy management plays a crucial role in the architecture. As the Companion must remain usable in a variety of environments, it has to be flexible and adaptable to various operating conditions. The Mobile Digital Companion has an unconventional architecture that saves energy by using system decomposition at different levels of the architecture and exploits locality of reference with dedicated, optimised modules. The approach is based on dedicated functionality and the extensive use of energy reduction techniques at all levels of system design. The system has an architecture with a general-purpose processor accompanied by a set of heterogeneous autonomous programmable modules, each providing an energy efficient implementation of dedicated tasks. A reconfigurable internal communication network switch exploits locality of reference and eliminates wasteful data copies
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