USE OF SCENARIO PLANNING APPROACH TO EXPLORE HIGH-DENSE, MIXED-USE FUNCTION DISTRIBUTION: A CASE OF FINANCIAL VIABILITY, DAYLIGHT AVAILABILITY, AND SOLAR ENVELOPE RADIATION.

Master'sMASTER OF ARTS (ARCHITECTURE

Drawing graphs for cartographic applications

Graph Drawing is a relatively young area that combines elements of graph theory, algorithms, (computational) geometry and (computational) topology. Research in this field concentrates on developing algorithms for drawing graphs while satisfying certain aesthetic criteria. These criteria are often expressed in properties like edge complexity, number of edge crossings, angular resolutions, shapes of faces or graph symmetries and in general aim at creating a drawing of a graph that conveys the information to the reader in the best possible way. Graph drawing has applications in a wide variety of areas which include cartography, VLSI design and information visualization. In this thesis we consider several graph drawing problems. The first problem we address is rectilinear cartogram construction. A cartogram, also known as value-by-area map, is a technique used by cartographers to visualize statistical data over a set of geographical regions like countries, states or counties. The regions of a cartogram are deformed such that the area of a region corresponds to a particular geographic variable. The shapes of the regions depend on the type of cartogram. We consider rectilinear cartograms of constant complexity, that is cartograms where each region is a rectilinear polygon with a constant number of vertices. Whether a cartogram is good is determined by how closely the cartogram resembles the original map and how precisely the area of its regions describe the associated values. The cartographic error is defined for each region as jAc¡Asj=As, where Ac is the area of the region in the cartogram and As is the specified area of that region, given by the geographic variable to be shown. In this thesis we consider the construction of rectilinear cartograms that have correct adjacencies of the regions and zero cartographic error. We show that any plane triangulated graph admits a rectilinear cartogram where every region has at most 40 vertices which can be constructed in O(nlogn) time. We also present experimental results that show that in practice the algorithm works significantly better than suggested by the complexity bounds. In our experiments on real-world data we were always able to construct a cartogram where the average number of vertices per region does not exceed five. Since a rectangle has four vertices, this means that most of the regions of our rectilinear car tograms are in fact rectangles. Moreover, the maximum number vertices of each region in these cartograms never exceeded ten. The second problem we address in this thesis concerns cased drawings of graphs. The vertices of a drawing are commonly marked with a disk, but differentiating between vertices and edge crossings in a dense graph can still be difficult. Edge casing is a wellknown method—used, for example, in electrical drawings, when depicting knots, and, more generally, in information visualization—to alleviate this problem and to improve the readability of a drawing. A cased drawing orders the edges of each crossing and interrupts the lower edge in an appropriate neighborhood of the crossing. One can also envision that every edge is encased in a strip of the background color and that the casing of the upper edge covers the lower edge at the crossing. If there are no application-specific restrictions that dictate the order of the edges at each crossing, then we can in principle choose freely how to arrange them. However, certain orders will lead to a more readable drawing than others. In this thesis we formulate aesthetic criteria for a cased drawing as optimization problems and solve these problems. For most of the problems we present either a polynomial time algorithm or demonstrate that the problem is NP-hard. Finally we consider a combinatorial question in computational topology concerning three types of objects: closed curves in the plane, surfaces immersed in the plane, and surfaces embedded in space. In particular, we study casings of closed curves in the plane to decide whether these curves can be embedded as the boundaries of certain special surfaces. We show that it is NP-complete to determine whether an immersed disk is the projection of a surface embedded in space, or whether a curve is the boundary of an immersed surface in the plane that is not constrained to be a disk. However, when a casing is supplied with a self-intersecting curve, describing which component of the curve lies above and which below at each crossing, we can determine in time linear in the number of crossings whether the cased curve forms the projected boundary of a surface in space. As a related result, we show that an immersed surface with a single boundary curve that crosses itself n times has at most 2n=2 combinatorially distinct spatial embeddings and we discuss the existence of fixed-parameter tractable algorithms for related problems

Multi-objective Digital VLSI Design Optimisation

Modern VLSI design's complexity and density has been exponentially increasing over the past 50 years and recently reached a stage within its development, allowing heterogeneous, many-core systems and numerous functions to be integrated into a tiny silicon die. These advancements have revealed intrinsic physical limits of process technologies in advanced silicon technology nodes. Designers and EDA vendors have to handle these challenges which may otherwise result in inferior design quality, even failures, and lower design yields under time-to-market pressure. Multiple or many design objectives and constraints are emerging during the design process and often need to be dealt with simultaneously. Multi-objective evolutionary algorithms show flexible capabilities in maintaining multiple variable components and factors in uncertain environments. The VLSI design process involves a large number of available parameters both from designs and EDA tools. This provides many potential optimisation avenues where evolutionary algorithms can excel. This PhD work investigates the application of evolutionary techniques for digital VLSI design optimisation. Automated multi-objective optimisation frameworks, compatible with industrial design flows and foundry technologies, are proposed to improve solution performance, expand feasible design space, and handle complex physical floorplan constraints through tuning designs at gate-level. Methodologies for enriching standard cell libraries regarding drive strength are also introduced to cooperate with multi-objective optimisation frameworks, e.g., subsequent hill-climbing, providing a richer pool of solutions optimised for different trade-offs. The experiments of this thesis demonstrate that multi-objective evolutionary algorithms, derived from biological inspirations, can assist the digital VLSI design process, in an industrial design context, to more efficiently search for well-balanced trade-off solutions as well as optimised design space coverage. The expanded drive granularity of standard cells can push the performance of silicon technologies with offering improved solutions regarding critical objectives. The achieved optimisation results can better deliver trade-off solutions regarding power, performance and area metrics than using standard EDA tools alone. This has been not only shown for a single circuit solution but also covered the entire standard-tool-produced design space

Algorithms for cartographic visualization

Maps are effective tools for communicating information to the general public and help people to make decisions in, for example, navigation, spatial planning and politics. The mapmaker chooses the details to put on a map and the symbols to represent them. Not all details need to be geographic: thematic maps, which depict a single theme or attribute, such as population, income, crime rate, or migration, can very effectively communicate the spatial distribution of the visualized attribute. The vast amount of data currently available makes it infeasible to design all maps manually, and calls for automated cartography. In this thesis we presented efficient algorithms for the automated construction of various types of thematic maps. In Chapter 2 we studied the problem of drawing schematic maps. Schematic maps are a well-known cartographic tool; they visualize a set of nodes and edges (for example, highway or metro networks) in simplified form to communicate connectivity information as effectively as possible. Many schematic maps deviate substantially from the underlying geography since edges and vertices of the original network are moved in the simplification process. This can be a problem if we want to integrate the schematized network with a geographic map. In this scenario the schematized network has to be drawn with few orientations and links, while critical features (cities, lakes, etc.) of the base map are not obscured and retain their correct topological position with respect to the network. We developed an efficient algorithm to compute a collection of non-crossing paths with fixed orientations using as few links as possible. This algorithm approximates the optimal solution to within a factor that depends only on the number of allowed orientations. We can also draw the roads with different thicknesses, allowing us to visualize additional data related to the roads such as trafic volume. In Chapter 3 we studied methods to visualize quantitative data related to geographic regions. We first considered rectangular cartograms. Rectangular cartograms represent regions by rectangles; the positioning and adjacencies of these rectangles are chosen to suggest their geographic locations to the viewer, while their areas are chosen to represent the numeric values being communicated by the cartogram. One drawback of rectangular cartograms is that not every rectangular layout can be used to visualize all possible area assignments. Rectangular layouts that do have this property are called area-universal. We show that area-universal layouts are always one-sided, and we present algorithms to find one-sided layouts given a set of adjacencies. Rectangular cartograms often provide a nice visualization of quantitative data, but cartograms deform the underlying regions according to the data, which can make the map virtually unrecognizable if the data value differs greatly from the original area of a region or if data is not available at all for a particular region. A more direct method to visualize the data is to place circular symbols on the corresponding region, where the areas of the symbols correspond to the data. However, these maps, so-called symbol maps, can appear very cluttered with many overlapping symbols if large data values are associated with small regions. In Chapter 4 we proposed a novel type of quantitative thematic map, called necklace map, which overcomes these limitations. Instead of placing the symbols directly on a region, we place the symbols on a closed curve, the necklace, which surrounds the map. The location of a symbol on the necklace should be chosen in such a way that the relation between symbol and region is as clear as possible. Necklace maps appear clear and uncluttered and allow for comparatively large symbol sizes. We developed algorithms to compute necklace maps and demonstrated our method with experiments using various data sets and maps. In Chapter 5 and 6 we studied the automated creation of ow maps. Flow maps are thematic maps that visualize the movement of objects, such as people or goods, between geographic regions. One or more sources are connected to several targets by lines whose thickness corresponds to the amount of ow between a source and a target. Good ow maps reduce visual clutter by merging (bundling) lines smoothly and by avoiding self-intersections. We developed a new algorithm for drawing ow trees, ow maps with a single source. Unlike existing methods, our method merges lines smoothly and avoids self-intersections. Our method is based on spiral trees, a new type of Steiner trees that we introduced. Spiral trees have an angle restriction which makes them appear smooth and hence suitable for drawing ow maps. We study the properties of spiral trees and give an approximation algorithm to compute them. We also show how to compute ow trees from spiral trees and we demonstrate our approach with extensive experiments

Adaptive Layout for Interactive Documents

This thesis presents a novel approach to create automated layouts for rich illustrative material that could adapt according to the screen size and contextual requirements. The adaption not only considers global layout but also deals with the content and layout adaptation of individual illustrations in the layout. An unique solution has been developed that integrates constraint-based and force-directed techniques to create adaptive grid-based and non-grid layouts. A set of annotation layouts are developed which adapt the annotated illustrations to match the contextual requirements over time

Modeling and Simulation of Advanced Nano-Scale Very Large Scale Integration Circuits

With VLSI(very large scale integration) technology shrinking and frequency increasing, the minimum feature size is smaller than sub-wavelength lithography wavelength, and the manufacturing cost is significantly increasing in order to achieve a good yield. Consequently design companies need to further lower power consumption. All these factors bring new challenges; simulation and modeling need to handle more design constraints, and need to work with modern manufacturing processes. In this dissertation, algorithms and new methodology are presented for these problems: (1) fast and accurate capacitance extraction, (2) capacitance extraction considering lithography effect, (3) BEOL(back end of line) impact on SRAM(static random access memory) performance and yield, and (4) new physical synthesis optimization flow is used to shed area and reduce the power consumption. Interconnect parasitic extraction plays an important role in simulation, verification, optimization. A fast and accurate parasitic extraction algorithm is always important for a current design automation tool. In this dissertation, we propose a new algorithm named HybCap to efficiently handle multiple planar, conformal or embedded dielectric media. From experimental results, the new method is significantly faster than the previous one, 77X speedup, and has a 99% memory savings compared with FastCap and 2X speedup, and has an 80% memory savings compared with PHiCap for complex dielectric media. In order to consider lithography effect in the existing LPE(Layout Parasitic Extraction) flow, a modified LPE flow and fast algorithms for interconnect parasitic extraction are proposed in this dissertation. Our methodology is efficient, compatible with the existing design flow and has high accuracy. With the new enhanced parasitic extraction flow, simulation of BEOL effect on SRAM performance becomes possible. A SRAM simulation model with internal cell interconnect RC parasitics is proposed in order to study the BEOL lithography impact. The impact of BEOL variations on memory designs are systematically evaluated in this dissertation. The results show the power estimation with our SRAM model is more accurate. Finally, a new optimization flow to shed area blow in the design synthesis flow is proposed, which is one level beyond simulation and modeling to directly optimize design, but is also built upon accurate simulations and modeling. Two simple, yet efficient, buffering and gate sizing techniques are presented. On 20 industrial designs in 45nm and 65nm, our new work achieves 12.5% logic area growth reduction, 5.8% total area reduction, 10% wirelength reduction and 770 ps worst slack improvement on average

An Intelligent Expert System for Decision Analysis and Support in Multi-Attribute Layout Optimization

Layout Decision Analysis and Design is a ubiquitous problem in a variety of work domains that is important from both strategic and operational perspectives. It is largely a complex, vague, difficult, and ill-structured problem that requires intelligent and sophisticated decision analysis and design support. Inadequate information availability, combinatorial complexity, subjective and uncertain preferences, and cognitive biases of decision makers often hamper the procurement of a superior layout configuration. Consequently, it is desirable to develop an intelligent decision support system for layout design that could deal with such challenging issues by providing efficient and effective means of generating, analyzing, enumerating, ranking, and manipulating superior alternative layouts. We present a research framework and a functional prototype for an interactive Intelligent System for Decision Support and Expert Analysis in Multi-Attribute Layout Optimization (IDEAL) based on soft computing tools. A fundamental issue in layout design is efficient production of superior alternatives through the incorporation of subjective and uncertain design preferences. Consequently, we have developed an efficient and Intelligent Layout Design Generator (ILG) using a generic two-dimensional bin-packing formulation that utilizes multiple preference weights furnished by a fuzzy Preference Inferencing Agent (PIA). The sub-cognitive, intuitive, multi-facet, and dynamic nature of design preferences indicates that an automated Preference Discovery Agent (PDA) could be an important component of such a system. A user-friendly, interactive, and effective User Interface is deemed critical for the success of the system. The effectiveness of the proposed solution paradigm and the implemented prototype is demonstrated through examples and cases. This research framework and prototype contribute to the field of layout decision analysis and design by enabling explicit representation of experts? knowledge, formal modeling of fuzzy user preferences, and swift generation and manipulation of superior layout alternatives. Such efforts are expected to afford efficient procurement of superior outcomes and to facilitate cognitive, ergonomic, and economic efficiency of layout designers as well as future research in related areas. Applications of this research are broad ranging including facilities layout design, VLSI circuit layout design, newspaper layout design, cutting and packing, adaptive user interfaces, dynamic memory allocation, multi-processor scheduling, metacomputing, etc

The 1991 3rd NASA Symposium on VLSI Design

Papers from the symposium are presented from the following sessions: (1) featured presentations 1; (2) very large scale integration (VLSI) circuit design; (3) VLSI architecture 1; (4) featured presentations 2; (5) neural networks; (6) VLSI architectures 2; (7) featured presentations 3; (8) verification 1; (9) analog design; (10) verification 2; (11) design innovations 1; (12) asynchronous design; and (13) design innovations 2