Microwave and Millimeter-wave Concurrent Multiband Low-Noise Amplifiers and Receiver Front-end in SiGe BiCMOS Technology

A fully integrated SiGe BiCMOS concurrent multiband receiver front-end and its building blocks including multiband low-noise amplifiers (LNAs), single-to-differential amplifiers and mixer are presented for various Ku-/K-/Ka-band applications. The proposed concurrent multiband receiver building blocks and receiver front-end achieve the best stopband rejection performances as compared to the existing multiband LNAs and receivers. First, a novel feedback tri-band load composed of two inductor feedback notch filters is proposed to overcome the low Q-factor of integrated passive inductors, and hence it provides superior stopband rejection ratio (SRR). A new 13.5/24/35-GHz concurrent tri-band LNA implementing the feedback tri-band load is presented. The developed tri-band LNA is the first concurrent tri-band LNA operating up to millimeter-wave region. By expanding the operating principle of the feedback tri-band load, a 21.5/36.5-GHz concurrent dual-band LNA with an inductor feedback dual-band load and another 23/36-GHz concurrent dual-band LNA with a new transformer feedback dual-band load are also presented. The latter provides more degrees of freedom for the creation of the stopband and passbands as compared to the former. A 22/36-GHz concurrent dual-band single-to-differential LNA employing a novel single-to-differential transformer feedback dual-band load is presented. The developed LNA is the first true concurrent dual-band single-to-differential amplifier. A novel 24.5/36.5 GHz concurrent dual-band merged single-to-differential LNA and mixer implementing the proposed single-to-differential transformer feedback dual-band load is also presented. With a 21-GHz LO signal, the down-converted dual IF bands are located at 3.5/15.5 GHz for two passband signals at 24.5/36.5 GHz, respectively. The proposed merged LNA and mixer is the first fully integrated concurrent dual-band mixer operating up to millimeter-wave frequencies without using any switching mechanism. Finally, a 24.5/36.5-GHz concurrent dual-band receiver front-end is proposed. It consists of the developed concurrent dual-band LNA using the single-to-single transformer feedback dual-band load and the developed concurrent dual-band merged LNA and mixer employing the single-to-differential transformer feedback dual-band load. The developed concurrent dual-band receiver front-end achieves the highest gain and the best NF performances with the largest SRRs, while operating at highest frequencies up to millimeter-wave region, among the concurrent dual-band receivers reported to date

Microwave and Millimeter-wave Concurrent Multiband Low-Noise Amplifiers and Receiver Front-end in SiGe BiCMOS Technology

A fully integrated SiGe BiCMOS concurrent multiband receiver front-end and its building blocks including multiband low-noise amplifiers (LNAs), single-to-differential amplifiers and mixer are presented for various Ku-/K-/Ka-band applications. The proposed concurrent multiband receiver building blocks and receiver front-end achieve the best stopband rejection performances as compared to the existing multiband LNAs and receivers. First, a novel feedback tri-band load composed of two inductor feedback notch filters is proposed to overcome the low Q-factor of integrated passive inductors, and hence it provides superior stopband rejection ratio (SRR). A new 13.5/24/35-GHz concurrent tri-band LNA implementing the feedback tri-band load is presented. The developed tri-band LNA is the first concurrent tri-band LNA operating up to millimeter-wave region. By expanding the operating principle of the feedback tri-band load, a 21.5/36.5-GHz concurrent dual-band LNA with an inductor feedback dual-band load and another 23/36-GHz concurrent dual-band LNA with a new transformer feedback dual-band load are also presented. The latter provides more degrees of freedom for the creation of the stopband and passbands as compared to the former. A 22/36-GHz concurrent dual-band single-to-differential LNA employing a novel single-to-differential transformer feedback dual-band load is presented. The developed LNA is the first true concurrent dual-band single-to-differential amplifier. A novel 24.5/36.5 GHz concurrent dual-band merged single-to-differential LNA and mixer implementing the proposed single-to-differential transformer feedback dual-band load is also presented. With a 21-GHz LO signal, the down-converted dual IF bands are located at 3.5/15.5 GHz for two passband signals at 24.5/36.5 GHz, respectively. The proposed merged LNA and mixer is the first fully integrated concurrent dual-band mixer operating up to millimeter-wave frequencies without using any switching mechanism. Finally, a 24.5/36.5-GHz concurrent dual-band receiver front-end is proposed. It consists of the developed concurrent dual-band LNA using the single-to-single transformer feedback dual-band load and the developed concurrent dual-band merged LNA and mixer employing the single-to-differential transformer feedback dual-band load. The developed concurrent dual-band receiver front-end achieves the highest gain and the best NF performances with the largest SRRs, while operating at highest frequencies up to millimeter-wave region, among the concurrent dual-band receivers reported to date

Concurrent Quad-band Low Noise Amplifier (QB-LNA) using Multisection Impedance Transformer

A quad-band low noise amplifier (QB-LNA) based on multisection impedance transformer designed and evaluated in this research. As a novelty, a multisection impedance transformer was used to produce QB-LNA. A multisection impedance transformer is used as input and output impedance matching because it has higher stability, large Q factor, and low noise than lumpedcomponent.The QB-LNA was designed on FR4 microstrip substrate with er= 4.4, thickness h=0.8 mm, and tan d= 0.026. The proposed QB-LNA was designed and analyzed by Advanced Design System (ADS).The simulation has shown that QB-LNA achieves gain (S21) of 22.91 dB, 16.5 dB,  11.18 dB, and 7.25 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively.The QB-LNA obtainreturn loss (S11) of -21.28 dB, -31.87 dB,  -28.08 dB, and -30.85 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. It also achieves a noise figure (nf) of 2.35 dB, 2.13 dB, 2.56 dB, and 3.55 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. This research also has shown that the figure of merit (FoM) of the proposed QB-LNA is higher than that of another multiband LNA

Recent Developments of Dual-Band Doherty Power Amplifiers for Upcoming Mobile Communications Systems

Power amplifiers in modern and future communications should be able to handle different modulation standards at different frequency bands, and in addition, to be compatible with the previous generations. This paper reviews the recent design techniques that have been used to operate dual-band amplifiers and in particular the Doherty amplifiers. Special attention is focused on the design methodologies used for power splitters, phase compensation networks, impedance inverter networks and impedance transformer networks of such power amplifier. The most important materials of the dual-band Doherty amplifier are highlighted and surveyed. The main problems and challenges covering dual-band design concepts are presented and discussed. In addition, improvement techniques to enhance such operations are also exploited. The study shows that the transistor parasitic has a great impact in the design of a dual-band amplifier, and reduction of the transforming ratio of the inverter simplifies the dual-band design. The offset line can be functionally replaced by a Π-network in dual-band design rather than T-network

Concurrent Dual-band Doherty Power Amplifiers for Carrier Aggregation

Carrier aggregation is the main feature of the Long Term Evolution advanced (LTE-A) standard to increase the spectral efficiency and communication bandwidth. It calls for wireless transmitters to be multi-band and multi-standard to meet the demands of various deployment scenarios. In addition, these transmit radios must efficiently amplify signals characterized with a high peak-to-average power ratio (PAPR), which is caused by advanced modulation schemes. These two factors highlight the need for the multi-band Doherty power amplifier (DPA), which allows the transmitter remain in high efficiency at back-off power levels and maintain that high efficiency over multiple frequency bands. In this work, a novel output combining network is presented for the dual-band DPA design with extended fractional bandwidth for carrier aggregated signals. The proposed output combiner employs a modified Pi-shape network, which enables the absorption of output capacitances from both the main and peaking devices and eliminates the need for phase offset lines which are major sources of bandwidth limitation in the existing multiband DPAs. In addition to performing the impedance inversion, the proposed combiner incorporates the biasing feeds and presents small low-frequency impedances to both the main and peaking transistors. The inclusion of the bias feeds and small low low-frequency impedance feature improves the linearizability of the DPA when stimulated with concurrent dual-band modulated signals. Lastly, by using the gain contour at the back-off power level, the non-linear AM-AM response caused by the varying input capacitance of the main transistor is mitigated. The proposed dual-band output power combiner and the back-off gain contour technique were applied to design of a dual-band two-way Doherty PA using the commercialized 25W Gallium Nitride (GaN) transistor. Measurement of the two-way DPA shows a gain of 7.5- 9.5 dB at 2.05 - 2.3 GHz and 9 - 11 dB at 3.2 - 3.62 GHz. The efficiency at 6 dB back off is greater than 49% and 47% across the two frequency bands. The linearizability of the dual-band DPA is validated using various carrier aggregated signals. The PA exhibits linear behaviour when driven by up to 80 MHz intra-band carrier aggregated signal and 20 MHz concurrent dual-band signal after DPD. Additionally, carrier aggregated signals usually lead to a PAPR value between 8-10 dB. The efficiency of classic two-way DPA deteriorates when dealing with such signals. To cope with the efficiency deterioration, a three-way DPA was designed. Simulations of the three-way DPA show that the gain is greater than 9 dB within the two frequency bands, 2.05 - 2.32 GHz and 3.35 - 3.65 GHz. The efficiency at 10-dB back-off is greater than 40% in the two frequency bands

Microwave and Millimeter-Wave Multi-Band Power Amplifiers, Power Combining Networks, and Transmitter Front-End in Silicon Germanium BiCMOS Technology

This dissertation presents new circuit architectures and techniques for designing high performance microwave and millimeter-wave circuits using 0.18-µm SiGe BiCMOS process for advanced wireless communication and sensing systems. The high performance single- and multi-band power amplifiers working in microwave and millimeter-wave frequency ranges are proposed. A 10-19, 23-39, and 33-40 GHz concurrent tri-band power amplifier in the respective Ku-, K-, and Ka-band using the distributed amplifier structure is presented first. Instead of utilizing multi-band matching networks, this amplifier is realized based on distributed amplifier structure and two active notch filters employed at each gain cell to form tri-band response. In addition, a power amplifier operating across the entire K-band is proposed. By employing lumped-element Wilkinson power divider and combiner, it produces high output power, high gain, and power added efficiency characteristics over broadband due to its inherent low-pass filtering response. Moreover, a highly integrated V-band power amplifier is presented. This power amplifier consists of four medium unit power cells combined with a four-way parallel power combining network. Secondly, microwave and millimeter-wave power combining and dividing networks are proposed. A wideband power divider and combiner operating up to 67 GHz is developed by adopting capacitive loading slow-wave transmission line to reduce size as well as insertion loss. Also, two-way and 16-way 24/60 GHz dual-band power divider networks in the K/V-band are proposed. The two-way dual-band power divider is realized with a slow-wave transmission line and two shunt connected LC resonators in order to minimize the chip size as well as insertion loss. Furthermore, a 16-way dual-band power dividing and combining network is developed for a dual-band 24/60 GHz 4×4 array system. This network incorporates a two-way dual-band power divider, lumped-element based Wilkinson power dividers, and multi-section transmission line based Wilkinson structures. Finally, a K-/V-band dual-band transmitter front-end is proposed. To realize the transmitter, a diplexer with good diplexing performance and K- and V-band variable gain amplifiers having low phase variation with gain tuning are designed. The transmitter is integrated with two diplexers, K- and V-band variable gain amplifiers, and two power amplifiers resulting in high gain, high output power, and low-phase variation with all gain control stages

Comparison between single band and concurrent multi-band linear power amplifiers

Currently the multiple wireless data transmission technologies have been commercially implemented, such as long-term evolution (LTE), Wi-Fi, and Bluetooth. There is a keen requirement to combine the power amplifiers for those technologies into a single one which can amplifies concurrent multi-band signals. On the physically layer, there are two popular architectures, namely parallel single-band power amplifiers and concurrent multi-band power amplifiers. In this thesis, quantitative comparison between parallel single-band power amplifiers and concurrent multi-band power amplifiers has been presented theoretically in the aspects of area, drain efficiency and linearity. Methods of calculating drain efficiency is derived for concurrent multi-band PAs for different frequency ratios. Linearity issues of concurrent multi-band power amplifiers have been addressed based on the concepts of gain compression and intermodulation distortion. Final, area consumption has been compared for both architectures with current technologies. Results of the drain efficiency map versus 2-D frequency ratio are plotted in figures for class A, B and C. Linearity degradation of concurrent multi-band has been derived mathematically

An Energy-Efficient Reconfigurable Mobile Memory Interface for Computing Systems

The critical need for higher power efficiency and bandwidth transceiver design has significantly increased as mobile devices, such as smart phones, laptops, tablets, and ultra-portable personal digital assistants continue to be constructed using heterogeneous intellectual properties such as central processing units (CPUs), graphics processing units (GPUs), digital signal processors, dynamic random-access memories (DRAMs), sensors, and graphics/image processing units and to have enhanced graphic computing and video processing capabilities. However, the current mobile interface technologies which support CPU to memory communication (e.g. baseband-only signaling) have critical limitations, particularly super-linear energy consumption, limited bandwidth, and non-reconfigurable data access. As a consequence, there is a critical need to improve both energy efficiency and bandwidth for future mobile devices.;The primary goal of this study is to design an energy-efficient reconfigurable mobile memory interface for mobile computing systems in order to dramatically enhance the circuit and system bandwidth and power efficiency. The proposed energy efficient mobile memory interface which utilizes an advanced base-band (BB) signaling and a RF-band signaling is capable of simultaneous bi-directional communication and reconfigurable data access. It also increases power efficiency and bandwidth between mobile CPUs and memory subsystems on a single-ended shared transmission line. Moreover, due to multiple data communication on a single-ended shared transmission line, the number of transmission lines between mobile CPU and memories is considerably reduced, resulting in significant technological innovations, (e.g. more compact devices and low cost packaging to mobile communication interface) and establishing the principles and feasibility of technologies for future mobile system applications. The operation and performance of the proposed transceiver are analyzed and its circuit implementation is discussed in details. A chip prototype of the transceiver was implemented in a 65nm CMOS process technology. In the measurement, the transceiver exhibits higher aggregate data throughput and better energy efficiency compared to prior works

Concurrent Multi-Band Envelope Tracking Power Amplifiers for Emerging Wireless Communications

Emerging wireless communication is shifting toward data-centric broadband services, resulting in employment of sophisticated and spectrum efficient modulation and access techniques. This yields communication signals with large peak-to-average power ratios (PAPR) and stringent linearity requirements. For example, future wireless communication standard, such as long term evolution advanced (LTE-A) require adoption of carrier aggregation techniques to improve their effective modulation bandwidth. The carrier aggregation technique for LTE-A incorporates multiple carriers over a wide frequency range to create a wider bandwidth of up to 100MHz. This will require future power amplifiers (PAs) and transmitters to efficiently amplify concurrent multi-band signals with large PAPR, while maintaining good linearity. Different back-off efficiency enhancement techniques are available, such as envelope tracking (ET) and Doherty. ET has gained a lot of attention recently as it can be applied to both base station and mobile transmitters. Unfortunately, few publications have investigated concurrent multi-band amplification using ET PAs, mainly due to the limited bandwidth of the envelope amplifier. In this thesis, a novel approach to enable concurrent amplification of multi-band signals using a single ET PA will be presented. This thesis begins by studying the sources of nonlinearities in single-band and dual-band PAs. Based on the analysis, a design methodology is proposed to reduce the sources of memory effects in single-band and dual-band PAs from the circuit design stage and improve their linearizability. Using the proposed design methodology, a 45W GaN PA was designed. The PA was linearized using easy to implement, memoryless digital pre-distortion (DPD) with 8 and 28 coefficients when driven with single-band and dual-band signals, respectively. This analysis and design methodology will enable the design of PAs with reduced memory effects, which can be linearized using simple, power efficient linearization techniques, such as lookup table or memoryless polynomial DPD. Note that the power dissipation of the linearization engine becomes crucial as we move toward smaller base station cells, such as femto- and pico-cells, where complicated DPD models cannot be implemented due to their significant power overhead. This analysis is also very important when implementing a multi-band ET PA system, where the sources of memory effects in the PA itself are minimized through the proposed design methodology. Next, the principle of concurrent dual-band ET operation using the low frequency component (LFC) of the envelope of the dual-band signal is presented. The proposed dual-band ET PA modulates the drain voltage of the PA using the LFC of the envelope of the dual-band signal. This will enable concurrent dual-band operation of the ET PA without posing extra bandwidth requirements on the envelope amplifier. A detailed efficiency and linearity analysis of the dual-band ET PA is also presented. Furthermore, a new dual-band DPD model with supply dependency is proposed in this thesis, capable of capturing and compensating for the sources of distortion in the dual-band ET PA. To the best of our knowledge, concurrent dual-band operation of ET PAs using the LFC of the envelope of the dual-band signal is presented for the first time in the literature. The proposed dual-band ET operation is validated using the measurement results of two GaN ET PA prototypes. Lastly, the principle of concurrent dual-band ET operation is extended to multi-band signals using the LFC of the envelope of the multi-band signal. The proposed multi-band ET operation is validated using the measurement results of a tri-band ET PA. To the best of our knowledge, this is the first reported tri-band ET PA in literature. The tri-band ET PA is linearized using a new tri-band DPD model with supply dependency

Amplifier Architectures for Wireless Communication Systems

Ever-increasing demand in modern wireless communication systems leads researchers to focus on design challenges on one of the main components of RF transmitters and receivers, namely amplifiers. On the transmitter side, enhanced efficiency and broader bandwidth over single and multiple bands on power amplifiers will help to have superior performance in communication systems. On the other hand, for the receiver side, having low noise and high gain will be necessary to ensure good quality transmission over such systems. In light of these considerations, a unique approach in design methodologies are studied with low noise amplifiers (LNAs) for RF receivers and the Doherty technique is analyzed for efficiency enhancement for power amplifiers (PA) on the transmitters. This work can be outlined in two parts. In the first part, Low Noise RF amplifier designs with Bipolar Junction Transistor (BJT) are studied to achieve better performing LNAs for receivers. The aim is to obtain a low noise figure while optimizing the bandwidth and achieving a maximum available gain. There are two designs that are operating at different center frequencies and utilizing different transistors. The first design is a wideband low-noise amplifier operating at 2 GHz with a high power BJT. The proposed design uses only distributed elements to realize the input and output matching networks. Additionally, a passive DC bias network is used instead of an active DC bias network to avoid possible complications due to the lumped elements parasitic effects. The matching networks are designed based on the reflection coefficients that are derived based on the transistor’s available regions. The second design is a low voltage standing wave ratio (VSWR) amplifier with a low noise figure operating at 3 GHz. This design is following the same method as in the first design. Both these amplifiers are designed to operate in broadband applications and can be good candidates for base stations. The second part of this work focuses on the transmitter side of communication systems. For this part, Doherty Power Amplifier (DPA) is analyzed as an efficiency enhancement technique for PAs. A modified architecture is proposed to have wider bandwidth and higher efficiency. In the proposed design, the quarter-wave impedance inverter was eliminated. The input and the output of the main and peak amplifiers are matched to the load directly. Additionally, the input and output matching networks are realized only using distributed elements. The selected transistor for this design is a 10 W Gallium Nitride (GaN). The fabricated amplifier operates at the center frequency of 2 GHz and provides 40% fractional bandwidth, 54% of maximum power-added efficiency, and 12.5 dB or better small-signal gain. The design is showing promising results to be a good candidate for better-performing transmitters over the L- and S- band