Design of a 4.2-5.4 GHz differential LC VCO using 0.35 mu m SiGeBiCMOS technology for IEEE 802.11a applications

In this paper, a 4.2-5.4 GHz, -Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35 mu m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). According to post-layout simulation results, phase noise is -110.7 dBc/Hz at 1 MHz offset from 5.4 GHz carrier frequency and -113.4 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained from the simulations, utilizing accumulation-mode varactors. Phase noise was also found to be relatively low because of taking advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. Based on the simulation results, the circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit layout occupies an area of 0.6 mm(2) on Si substrate, including DC and RF pads

Failures in power-combining arrays

We derive a simple formula for the change in output when a device fails in a power-combining structure with identical matched devices. The loss is written in terms of the scattering coefficient of the failed device and reflection coefficient of an input port in the combining network. We apply this formula to several power combiners, including arrays in free space and enclosed waveguide structures. Our simulations indicate the output power degrades gracefully as devices fail, which is in agreement with previously published results

CMOS OTA-C high-frequency sinusoidal oscillators

Several topology families are given to implement practical CMOS sinusoidal oscillators by using operational transconductance amplifier-capacitor (OTA-C) techniques. Design techniques are proposed taking into account the CMOS OTA's dominant nonidealities. Building blocks are presented for amplitude control, both by automatic gain control (AGC) schemes and by limitation schemes. Experimental results from 3- and 2- mu m CMOS (MOSIS) prototypes that exhibit oscillation frequencies of up to 69 MHz are obtained. The amplitudes can be adjusted between 1 V peak to peak and 100 mV peak to peak. Total harmonic distortions from 2.8% down to 0.2% have been measured experimentally.Comisión Interministerial de Ciencia y Tecnología ME87-000

Distributed Integrated Circuits: An Alternative Approach to High-Frequency Design

Distributed integrated circuits are presented as a methodology to design high-frequency communication building blocks. Distributed circuits operate based on multiple parallel signal paths working in synchronization that can be used to enhance the frequency of operation, combine power, and enhance the robustness of the design. These multiple signal paths usually result in strong couplings inside the circuit that necessitate a treatment spanning architecture, circuits, devices, and electromagnetic levels of abstraction

Concepts and methods in optimization of integrated LC VCOs

Underlying physical mechanisms controlling the noise properties of oscillators are studied. This treatment shows the importance of inductance selection for oscillator noise optimization. A design strategy centered around an inductance selection scheme is executed using a practical graphical optimization method to optimize phase noise subject to design constraints such as power dissipation, tank amplitude, tuning range, startup condition, and diameters of spiral inductors. The optimization technique is demonstrated through a design example, leading to a 2.4-GHz fully integrated, LC voltage-controlled oscillator (VCO) implemented using 0.35-μm MOS transistors. The measured phase-noise values are -121, -117, and -115 dBc/Hz at 600-kHz offset from 1.91, 2.03, and 2.60-GHz carriers, respectively. The VCO dissipates 4 mA from a 2.5-V supply voltage. The inversion mode MOSCAP tuning is used to achieve 26% of tuning range. Two figures of merit for performance comparison of various oscillators are introduced and used to compare this work to previously reported results

Эффективность способов уменьшения фазовых шумов транзисторных генераторов СВЧ

Розглянуті поради щодо зменшення фазових шумів по результатах лінійного та нелінійного аналізів та ефективність їх впровадження у розробки генераторів.The phase-noise reduction advices as the result of linear and nonlinear analysis and the efficiency of their oscillators design applications are consided.Рассмотрены советы по уменьшению фазовых шумов на основании линейного и нелинейного анализов и эффективность их внедрения в разработки генераторов

A Wideband 77-GHz, 17.5-dBm Fully Integrated Power Amplifier in Silicon

A 77-GHz, +17.5 dBm power amplifier (PA) with fully integrated 50-Ω input and output matching and fabricated in a 0.12-µm SiGe BiCMOS process is presented. The PA achieves a peak power gain of 17 dB and a maximum single-ended output power of 17.5 dBm with 12.8% of power-added efficiency (PAE). It has a 3-dB bandwidth of 15 GHz and draws 165 mA from a 1.8-V supply. Conductor-backed coplanar waveguide (CBCPW) is used as the transmission line structure resulting in large isolation between adjacent lines, enabling integration of the PA in an area of 0.6 mm^2. By using a separate image-rejection filter incorporated before the PA, the rejection at IF frequency of 25 GHz is improved by 35 dB, helping to keep the PA design wideband