An Efficient and Cost Effective FPGA Based Implementation of the Viola-Jones Face Detection Algorithm

We present an field programmable gate arrays (FPGA) based implementation of the popular Viola-Jones face detection algorithm, which is an essential building block in many applications such as video surveillance and tracking. Our implementation is a complete system level hardware design described in a hardware description language and validated on the affordable DE2-115 evaluation board. Our primary objective is to study the achievable performance with a low-end FPGA chip based implementation. In addition, we release to the public domain the entire project. We hope that this will enable other researchers to easily replicate and compare their results to ours and that it will encourage and facilitate further research and educational ideas in the areas of image processing, computer vision, and advanced digital design and FPGA prototyping

A technology based complexity model for reversible Cuccaro ripple-carry adder

Reversible logic provides an alternative to classical computing, that may overcome many of the power dissipation problems. The paper presents a simple complexity model, from the study of a cascade of Cuccaro adders processed in standard 0.35 micrometer CMOS technology

A reconfigurable hybrid intelligent system for robot navigation

Soft computing has come of age to o er us a wide array of powerful and e cient algorithms that independently matured and in uenced our approach to solving problems in robotics, search and optimisation. The steady progress of technology, however, induced a ux of new real-world applications that demand for more robust and adaptive computational paradigms, tailored speci cally for the problem domain. This gave rise to hybrid intelligent systems, and to name a few of the successful ones, we have the integration of fuzzy logic, genetic algorithms and neural networks. As noted in the literature, they are signi cantly more powerful than individual algorithms, and therefore have been the subject of research activities in the past decades. There are problems, however, that have not succumbed to traditional hybridisation approaches, pushing the limits of current intelligent systems design, questioning their solutions of a guarantee of optimality, real-time execution and self-calibration. This work presents an improved hybrid solution to the problem of integrated dynamic target pursuit and obstacle avoidance, comprising of a cascade of fuzzy logic systems, genetic algorithm, the A* search algorithm and the Voronoi diagram generation algorithm

Online self-repair of FIR filters

Chip-level failure detection has been a target of research for some time, but today's very deep-submicron technology is forcing such research to move beyond detection. Repair, especially self-repair, has become very important for containing the susceptibility of today's chips. This article introduces a self-repair-solution for the digital FIR filter, one of the key blocks used in DSPs

Minimization of Quantum Circuits using Quantum Operator Forms

In this paper we present a method for minimizing reversible quantum circuits using the Quantum Operator Form (QOF); a new representation of quantum circuit and of quantum-realized reversible circuits based on the CNOT, CV and CV$^\dagger$ quantum gates. The proposed form is a quantum extension to the well known Reed-Muller but unlike the Reed-Muller form, the QOF allows the usage of different quantum gates. Therefore QOF permits minimization of quantum circuits by using properties of different gates than only the multi-control Toffoli gates. We introduce a set of minimization rules and a pseudo-algorithm that can be used to design circuits with the CNOT, CV and CV$^\dagger$ quantum gates. We show how the QOF can be used to minimize reversible quantum circuits and how the rules allow to obtain exact realizations using the above mentioned quantum gates.Comment: 11 pages, 14 figures, Proceedings of the ULSI Workshop 2012 (@ISMVL 2012