261 research outputs found

    High-Level Synthesis Based VLSI Architectures for Video Coding

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    High Efficiency Video Coding (HEVC) is state-of-the-art video coding standard. Emerging applications like free-viewpoint video, 360degree video, augmented reality, 3D movies etc. require standardized extensions of HEVC. The standardized extensions of HEVC include HEVC Scalable Video Coding (SHVC), HEVC Multiview Video Coding (MV-HEVC), MV-HEVC+ Depth (3D-HEVC) and HEVC Screen Content Coding. 3D-HEVC is used for applications like view synthesis generation, free-viewpoint video. Coding and transmission of depth maps in 3D-HEVC is used for the virtual view synthesis by the algorithms like Depth Image Based Rendering (DIBR). As first step, we performed the profiling of the 3D-HEVC standard. Computational intensive parts of the standard are identified for the efficient hardware implementation. One of the computational intensive part of the 3D-HEVC, HEVC and H.264/AVC is the Interpolation Filtering used for Fractional Motion Estimation (FME). The hardware implementation of the interpolation filtering is carried out using High-Level Synthesis (HLS) tools. Xilinx Vivado Design Suite is used for the HLS implementation of the interpolation filters of HEVC and H.264/AVC. The complexity of the digital systems is greatly increased. High-Level Synthesis is the methodology which offers great benefits such as late architectural or functional changes without time consuming in rewriting of RTL-code, algorithms can be tested and evaluated early in the design cycle and development of accurate models against which the final hardware can be verified

    Power-Aware HEVC Decoding with Tunable Image Quality

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    International audienceA high pressure is put on mobile devices to support increasingly advanced applications requiring more processing capabilities. Among those, the emerging High Efficiency Video Coding (HEVC) provides a better video quality for the same bit rate than the previous H.264 standard. A limitation in the usability of a mobile video playing device is the lack of support for guaranteeing stand-by time and up time for battery driven devices. The Green Metadata initiative within the MPEG standard was launched to address the power saving issues of the decoder and defines the technology requirements. In this paper, we propose a HEVC decoder with tunable decoding quality levels for maximum power savings as suggested in the scope of the Green Metadata initiative. Our experiments reveal that the modified HEVC video decoder can save up to 28 % of power consumption in real-world platforms while keeping better quality than decoding with H.264

    Rinnakkainen toteutus H.265 videokoodaus standardille

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    The objective of this study was to research the scalability of the parallel features in the new H.265 video compression standard, also know as High Efficiency Video Coding (HEVC). Compared to its predecessor, the H.264 standard, H.265 typically achieves around 50% bitrate reduction for the same subjective video quality. Especially videos with higher resolution (Full HD and beyond) achieve better compression ratios. Also a better utilization of parallel computing resources is provided. H.265 introduces two novel parallelization features: Tiles and Wavefront Parallel Processing (WPP). In Tiles, each video frame is divided into areas that can be decoded without referencing to other areas in the same frame. In WPP, the relations between code blocks in a frame are encoded so that the decoding process can progress through the frame as a front using multiple threads. In this study, the reference implementation for the H.265 decoder was augmented to support both of these parallelization features. The performance of the parallel implementations was measured using three different setups. From the measurement results it could be seen that the introduction of more CPU cores reduced the total decode time of the video frames to a certain point. When using the Tiles feature, it was observed that the encoding geometry, i.e. how each frame was divided into individually decodable areas, had a noticeable effect on the decode times with certain thread counts. When using WPP, it was observed that what was mostly synchronization overhead, sometimes had a negative effect on the decode times when using larger (4-12) amounts of threads.TÀmÀn tutkimuksen aiheena oli tutkia uuden H.265 videonpakkausstandardin (tunnetaan myös nimellÀ HEVC (engl. High Efficiency Video Coding)) rinnakkaisuusominaisuuksien skaalautuvuutta. Verrattuna edeltÀjÀÀnsÀ, H.264 videonpakkaustandardiin, H.265 tyypillisesti saavuttaa samalla kuvanlaadulla noin 50% pienemmÀn pakkauskoon. Erityisesti suuren resoluution videoilla (Full HD ja suuremmat) pakkaustehokkuuden paremmuus korostuu. Huomiota on kiinnitetty myös moniydinprosessoreiden hyödyntÀmiseen videokoodauksessa. H.265 tarjoaa kaksi uutta rinnakkaisuusominaisuutta: niin kutsutut Tiles- ja WPP-menetelmÀt (engl. \emph{Wavefront Parallel Processing}). Tiles-menetelmÀssÀ jokainen videon kuva jaetaan alueisiin, jotka voidaan purkaa viittaamatta saman kuvan muihin alueisiin. WPP-menetelmÀssÀ suhteet kuvan lohkoihin pakataan siten ettÀ purkamisprosessi pystyy etenemÀÀn kuvan lÀpi rintamana hyödyntÀen useampia sÀikeitÀ. TÀssÀ tutkimuksessa H.265 videodekooderin referenssitoteutusta laajennettiin tukemaan molempia nÀistÀ rinnakkaisuusominaisuuksista. SuorituskykyÀ mitattiin kÀyttÀen kolmea eri mittausasetelmaa. Mittaustuloksista ilmeni, ettÀ prosessoriydinten lukumÀÀrÀn kasvattaminen nopeutti videoiden purkamista tiettyyn pisteeseen asti. Tiles-menetelmÀÀ mitatessa havaittiin, ettÀ alueiden geometrialla, eli kuinka kuva jaettiin riippumattomiin alueisiin, on huomattava vaikutus purkamisnopeuteen tietyillÀ sÀiemÀÀrillÀ. WPP-menetelmÀÀ mitattaessa havaittiin ettÀ korkeampiin sÀiemÀÀriin (4-12) siirryttÀessÀ purkamisnopeus alkoi hidastua. TÀmÀ johtui pÀÀasiassa sÀikeiden keskinÀiseen synkronointiin kuluvasta ajasta

    HEVC real-time decoding

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    The new High Efficiency Video Coding Standard (HEVC) was finalized in January 2013. Compared to its predecessor H.264 / MPEG4-AVC, this new international standard is able to reduce the bitrate by 50% for the same subjective video quality. This paper investigates decoder optimizations that are needed to achieve HEVC real-time software decoding on a mobile processor. It is shown that HEVC real-time decoding up to high definition video is feasible using instruction extensions of the processor while decoding 4K ultra high definition video in real-time requires additional parallel processing. For parallel processing, a picture-level parallel approach has been chosen because it is generic and does not require bitstreams with special indication

    A low complexity Wyner-Ziv coding solution for Light Field image transmission and storage

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    Compressing Light Field (LF) imaging data is a challenging but very important task for both LF image transmission and storage applications. In this paper, we propose a novel coding solution for LF images using the well-known Wyner-Ziv (WZ) information theorem. First, the LF image is decomposed into a fourth-dimensional LF (4D-LF) data format. Using a spiral scanning procedure, a pseudo-sequence of 4D-LF is generated. This sequence is then compressed in a distributed coding manner as specified in the WZ theorem. Secondly, a novel adaptive frame skipping algorithm is introduced to further explore the high correlation between 4D-LF pseudo-sequences. Experimental results show that the proposed LF image compression solution is able to achieve a significant performance improvement with respect to the standard, notably around 54% bitrate saving when compared with the standard High Efficiency Video Coding (HEVC) Intra benchmark while requiring less computational complexity

    An efficient interpolation filter VLSI architecture for HEVC standard

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    Challenges and solutions in H.265/HEVC for integrating consumer electronics in professional video systems

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