Advanced digital predistortion of power amplifiers for mobile and wireless communications

This research work focuses on improving the performances of digital predistorters while maintaining low computational complexity for mobile and wireless communication systems. Initially, the thesis presents the fundamental theory of power amplifiers, overview of existing linearisation and memory-effects compensation techniques and reveals the current issues in the field. Further, the thesis depicts the proposed solutions to the problems, including the developed in-band distortion modelling technique, model extraction methods, memoryless digital predistortion technique based on distortion components iterative injection, baseband equalisation technique for minimising memory effects, Matlab-ADS co-simulation system and adaptation circuit with an offline training scheme. The thesis presents the following contributions of the research work. A generalized in-band distortion modelling technique for predicting the nonlinear behaviour of power amplifiers is developed and verified experimentally. Analytical formulae are derived for calculating predistorter parameters. Two model extraction techniques based on the least-squares regression method and frequency-response analysis are developed and verified experimentally. The area of implementation and the trade-off between the methods are discussed. Adjustable memoryless digital predistortion technique based on the distortion components iterative injection method is proposed in order to overcome the distortion compensation limit peculiar to the conventional injection techniques. A baseband equalisation method is developed in order to provide compensation of memory effects for increasing the linearising performance of the proposed predistorter. A combined Matlab-ADS co-simulation system is designed for providing powerful simulation tools. An adaptation circuit is developed for the proposed predistorter for enabling its adaptation to environmental conditions. The feasibility, performances and computational complexity of the proposed digital predistortion are examined by simulations and experimentally. The proposed method is tuneable for achieving the best ratio of linearisation degree to computational complexity for any particular application

Advanced digital predistortion of power amplifiers for mobile and wireless communications

This research work focuses on improving the performances of digital predistorters while maintaining low computational complexity for mobile and wireless communication systems. Initially, the thesis presents the fundamental theory of power amplifiers, overview of existing linearisation and memory-effects compensation techniques and reveals the current issues in the field. Further, the thesis depicts the proposed solutions to the problems, including the developed in-band distortion modelling technique, model extraction methods, memoryless digital predistortion technique based on distortion components iterative injection, baseband equalisation technique for minimising memory effects, Matlab-ADS co-simulation system and adaptation circuit with an offline training scheme. The thesis presents the following contributions of the research work. A generalized in-band distortion modelling technique for predicting the nonlinear behaviour of power amplifiers is developed and verified experimentally. Analytical formulae are derived for calculating predistorter parameters. Two model extraction techniques based on the least-squares regression method and frequency-response analysis are developed and verified experimentally. The area of implementation and the trade-off between the methods are discussed. Adjustable memoryless digital predistortion technique based on the distortion components iterative injection method is proposed in order to overcome the distortion compensation limit peculiar to the conventional injection techniques. A baseband equalisation method is developed in order to provide compensation of memory effects for increasing the linearising performance of the proposed predistorter. A combined Matlab-ADS co-simulation system is designed for providing powerful simulation tools. An adaptation circuit is developed for the proposed predistorter for enabling its adaptation to environmental conditions. The feasibility, performances and computational complexity of the proposed digital predistortion are examined by simulations and experimentally. The proposed method is tuneable for achieving the best ratio of linearisation degree to computational complexity for any particular application.EThOS - Electronic Theses Online ServiceGBUnited Kingdo

Digital electronic predistortion for optical communications

The distortion of optical signals has long been an issue limiting the performance of communication systems. With the increase of transmission speeds the effects of distortion are becoming more prominent. Because of this, the use of methods known from digital signal processing (DSP) are being introduced to compensate for them. Applying DSP to improve optical signals has been limited by a discrepancy in digital signal processing speeds and optical transmission speeds. However high speed Field Programmable Gate Arrays (FPGA) which are sufficiently fast have now become available making DSP experiments without costly ASIC implementation possible for optical transmission experiments. This thesis focuses on Look Up Table (LUT) based digital Electronic Predistortion (EPD) for optical transmission. Because it is only one out of many possible implementations of EPD, it has to be placed in context with other EPD techniques and other distortion combating techniques in general, especially since it is possible to combine the different techniques. Building an actual transmitter means that compromises and decisions have to be made in the design and implementation of an EPD based system. These are based on balancing the desire to achieve optimal performance with technological and economic limitations. This is partly done using optical simulations to asses the performance. This thesis describes a novel experimental transmitter that has been built as part of this research applying LUT based EPD to an optical signal. The experimental transmitter consists of a digital design (using a hardware description language) for a pair of FPGAs and an analogue optical/electronic setup including two standard DAC integrated circuits. The DSP in the transmitter compensated for both chromatic dispersion and self phase modulation. We achieved transmission of 10.7 Gb/s non-return-to-zero (NRZ) signals with a +4 dBm launch power over 450 km keeping the required optical-signal-to-noise-ratio (OSNR) for a bit-error-rate of 2x10^{-3} below 11 dB. In doing so we showed experimentally, for the first time, that nonlinear effects can be compensated with this approach and that the combination of FPGA-DAC is a viable approach for an experimental setup

Delta-Sigma Modulator-Embedded Digital Predistortion for 5G Transmitter Linearization

This article presents two novel digital predistortion (DPD) based architectures that jointly mitigate the inphase/quadrature (IQ) modulator impairments and the power amplifier (PA) nonlinear distortion in wireless transmitters. The proposed architectures are multibit cartesian and complex delta-sigma modulator-based joint DPDs, called CDSM-JDPD and CXDSM-JDPD, respectively, which enable using low-cost digital-to-analog converters (DACs) while offering versatile linearization capabilities to combat the coexisting distortions of the PA and the IQ modulator. The proposed approach alleviates the need for reverse modeling and implementation of extra hardware to separately deal with frequency-dependent IQ impairments. Moreover, the CXDSM-JDPD enhances the linearization performance and relaxes the high oversampling ratio (OSR) requirement by quantizing the signal more efficiently. Furthermore, the presented concepts inherently support the use of low-resolution DACs, which offers a tremendous advantage in designing and implementing low-cost and energy-efficient radio transmitters. Extensive set of hardware-in-the-loop RF verification measurements with a commercial PA are provided, including two timely 5G New Radio (NR) scenarios at NR bands n3 and n78, while covering channel bandwidths up to 100 MHz and varying the OSR and the DAC bit resolution. The obtained results demonstrate the excellent linearization capabilities of the proposed solutions and their superiority compared to other DSM-based DPD approaches.acceptedVersionPeer reviewe

Mixed-Signal Multimode Radio Software/Hardware Development Platform

Radio frequency power amplifiers (PAs) are the most challenging part of the design of radio systems since they dictate the overall system's performance in terms of power efficiency and distortion generation. The performance is further challenged by modern modulation schemes which are characterized by highly varying signal envelopes. In order to meet the spectrum mask requirements, PAs are usually operated at high power back-off to ensure linearity, at the cost of efficiency. To tackle this issue, many efficiency enhancement techniques have been presented in the literature. In fact, these techniques do increase the PA power efficiency at back-off, however, efficiency enhancement techniques do not ensure the linearity of the PA. Furthermore, these techniques may lead to additional distortion. On the other hand, several linearization techniques have been developed to mitigate the PA nonlinearity problem and allow the PA to operate at less back-off. Digital Pre-Distortion (DPD) technique is gaining more attention, as compared to other linearization techniques, thanks to its simple concept and advancements in digital signal processors (DSP) and signal converters. DPD technique consists of introducing a nonlinear function before the PA so that the overall cascaded system behaves linearly. It was clear from the literature that this technique showed good performance. Yet, it has primarily been validated using commercial test equipment, which has good capabilities, and far from the real world environment in which this technique would be implemented. Indeed, DPDs would need to be implemented in signal processors characterised by limited resources and computational accuracy. This thesis presents an implementation of several DPD models, namely look-up table (LUT), memoryless polynomial and memory polynomial (MP), on a field programmable gate array (FPGA). A novel model reformulation made this implementation possible in fixed-point arithmetic. Measurements were collected to validate the DPD models' implementation and an improvement of the signal quality was recorded in terms of error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR). As many wireless access technologies must continue to coexist, multi-standard radio systems are required to reduce the cost while maintaining the interoperability. This thesis presents a development platform for multimode radio which comprises mixed-signal modules. The platform provides the capacity for hardware and software development. In fact, the FPGA under investigation allowed for the implementation of a baseband transceiver and DPD schemes. In addition, a software tool was developed as a dashboard to control and monitor the system. The radio system in the platform was optimized through the equalization of the feedback receiver frequency response performed through a simultaneous measurement of the amplitude ripple of the transmitter and receiver. Furthermore, a phase-coherent frequency synthesizer was designed to bring more flexibility by allowing the transmitter's carrier frequency to be different from the receiver's frequency

Digital predistortion of RF amplifiers using baseband injection for mobile broadband communications

Radio frequency (RF) power amplifiers (PAs) represent the most challenging design parts of wireless transmitters. In order to be more energy efficient, PAs should operate in nonlinear region where they produce distortion that significantly degrades the quality of signal at transmitter’s output. With the aim of reducing this distortion and improve signal quality, digital predistortion (DPD) techniques are widely used. This work focuses on improving the performances of DPDs in modern, next-generation wireless transmitters. A new adaptive DPD based on an iterative injection approach is developed and experimentally verified using a 4G signal. The signal performances at transmitter output are notably improved, while the proposed DPD does not require large digital signal processing memory resources and computational complexity. Moreover, the injection-based DPD theory is extended to be applicable in concurrent dual-band wireless transmitters. A cross-modulation problem specific to concurrent dual-band transmitters is investigated in detail and novel DPD based on simultaneous injection of intermodulation and cross-modulation distortion products is proposed. In order to mitigate distortion compensation limit phenomena and memory effects in highly nonlinear RF PAs, this DPD is further extended and complete generalised DPD system for concurrent dual-band transmitters is developed. It is clearly proved in experiments that the proposed predistorter remarkably improves the in-band and out-of-band performances of both signals. Furthermore, it does not depend on frequency separation between frequency bands and has significantly lower complexity in comparison with previously reported concurrent dual-band DPDs

ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201

A fast engineering approach to high efficiency power amplifier linearization for avionics applications

This PhD thesis provides a fast engineering approach to the design of digital predistortion (DPD) linearizers from several perspectives: i) enhancing the off-line training performance of open-loop DPD, ii) providing robustness and reducing the computational complexity of the parameters identification subsystem and, iii) importing machine learning techniques to favor the automatic tuning of power amplifiers (PAs) and DPD linearizers with several free-parameters to maximize power efficiency while meeting the linearity specifications. One of the essential parts of unmanned aerial vehicles (UAV) is the avionics, being the radio control one of the earliest avionics present in the UAV. Unlike the control signal, for transferring user data (such as images, video, etc.) real-time from the drone to the ground station, large transmission rates are required. The PA is a key element in the transmitter chain to guarantee the data transmission (video, photo, etc.) over a long range from the ground station. The more linear output power, the better the coverage or alternatively, with the same coverage, better SNR allows the use of high-order modulation schemes and thus higher transmission rates are achieved. In the context of UAV wireless communications, the power consumption, size and weight of the payload is of significant importance. Therefore, the PA design has to take into account the compromise among bandwidth, output power, linearity and power efficiency (very critical in battery-supplied devices). The PA can be designed to maximize its power efficiency or its linearity, but not both. Therefore, a way to deal with this inherent trade-off is to design high efficient amplification topologies and let the PA linearizers take care of the linearity requirements. Among the linearizers, DPD linearization is the preferred solution to both academia and industry, for its high flexibility and linearization performance. In order to save as many computational and power resources as possible, the implementation of an open-loop DPD results a very attractive solution for UAV applications. This thesis contributes to the PA linearization, especially on off-line training for open-loop DPD, by presenting two different methods for reducing the design and operating costs of an open-loop DPD, based on the analysis of the DPD function. The first method focuses on the input domain analysis, proposing mesh-selecting (MeS) methods to accurately select the proper samples for a computationally efficient DPD parameter estimation. Focusing in the MeS method with better performance, the memory I-Q MeS method is combined with feature extraction dimensionality reduction technique to allow a computational complexity reduction in the identification subsystem by a factor of 65, in comparison to using the classical QR-LS solver and consecutive samples selection. In addition, the memory I-Q MeS method has been proved to be of crucial interest when training artificial neural networks (ANN) for DPD purposes, by significantly reducing the ANN training time. The second method involves the use of machine learning techniques in the DPD design procedure to enlarge the capacity of the DPD algorithm when considering a high number of free parameters to tune. On the one hand, the adaLIPO global optimization algorithm is used to find the best parameter configuration of a generalized memory polynomial behavioral model for DPD. On the other hand, a methodology to conduct a global optimization search is proposed to find the optimum values of a set of key circuit and system level parameters, that properly combined with DPD linearization and crest factor reduction techniques, can exploit at best dual-input PAs in terms of maximizing power efficiency along wide bandwidths while being compliant with the linearity specifications. The advantages of these proposed techniques have been validated through experimental tests and the obtained results are analyzed and discussed along this thesis.Aquesta tesi doctoral proporciona unes pautes per al disseny de linealitzadors basats en predistorsió digital (DPD) des de diverses perspectives: i) millorar el rendiment del DPD en llaç obert, ii) proporcionar robustesa i reduir la complexitat computacional del subsistema d'identificació de paràmetres i, iii) incorporació de tècniques d'aprenentatge automàtic per afavorir l'auto-ajustament d'amplificadors de potència (PAs) i linealitzadors DPD amb diversos graus de llibertat per poder maximitzar l’eficiència energètica i al mateix temps acomplir amb les especificacions de linealitat. Una de les parts essencials dels vehicles aeris no tripulats (UAV) _es l’aviònica, sent el radiocontrol un dels primers sistemes presents als UAV. Per transferir dades d'usuari (com ara imatges, vídeo, etc.) en temps real des del dron a l’estació terrestre, es requereixen taxes de transmissió grans. El PA _es un element clau de la cadena del transmissor per poder garantir la transmissió de dades a grans distàncies de l’estació terrestre. A major potència de sortida, més cobertura o, alternativament, amb la mateixa cobertura, millor relació senyal-soroll (SNR) la qual cosa permet l’ús d'esquemes de modulació d'ordres superiors i, per tant, aconseguir velocitats de transmissió més altes. En el context de les comunicacions sense fils en UAVs, el consum de potència, la mida i el pes de la càrrega útil són de vital importància. Per tant, el disseny del PA ha de tenir en compte el compromís entre ample de banda, potència de sortida, linealitat i eficiència energètica (molt crític en dispositius alimentats amb bateries). El PA es pot dissenyar per maximitzar la seva eficiència energètica o la seva linealitat, però no totes dues. Per tant, per afrontar aquest compromís s'utilitzen topologies amplificadores d'alta eficiència i es deixa que el linealitzador s'encarregui de garantir els nivells necessaris de linealitat. Entre els linealitzadors, la linealització DPD és la solució preferida tant per al món acadèmic com per a la indústria, per la seva alta flexibilitat i rendiment. Per tal d'estalviar tant recursos computacionals com consum de potència, la implementació d'un DPD en lla_c obert resulta una solució molt atractiva per a les aplicacions UAV. Aquesta tesi contribueix a la linealització del PA, especialment a l'entrenament fora de línia de linealitzadors DPD en llaç obert, presentant dos mètodes diferents per reduir el cost computacional i augmentar la fiabilitat dels DPDs en llaç obert. El primer mètode se centra en l’anàlisi de l’estadística del senyal d'entrada, proposant mètodes de selecció de malla (MeS) per seleccionar les mostres més significatives per a una estimació computacionalment eficient dels paràmetres del DPD. El mètode proposat IQ MeS amb memòria es pot combinar amb tècniques de reducció del model del DPD i d'aquesta manera poder aconseguir una reducció de la complexitat computacional en el subsistema d’identificació per un factor de 65, en comparació amb l’ús de l'algoritme clàssic QR-LS i selecció de mostres d'entrenament consecutives. El segon mètode consisteix en l’ús de tècniques d'aprenentatge automàtic pel disseny del DPD quan es considera un gran nombre de graus de llibertat (paràmetres) per sintonitzar. D'una banda, l'algorisme d’optimització global adaLIPO s'utilitza per trobar la millor configuració de paràmetres d'un model polinomial amb memòria generalitzat per a DPD. D'altra banda, es proposa una estratègia per l’optimització global d'un conjunt de paràmetres clau per al disseny a nivell de circuit i sistema, que combinats amb linealització DPD i les tècniques de reducció del factor de cresta, poden maximitzar l’eficiència de PAs d'entrada dual de gran ample de banda, alhora que compleixen les especificacions de linealitat. Els avantatges d'aquestes tècniques proposades s'han validat mitjançant proves experimentals i els resultats obtinguts s'analitzen i es discuteixen al llarg d'aquesta tesi