Utilizing Unconventional CMOS Techniques for Low Voltage Low Power Analog Circuits Design for Biomedical Applications

Tato disertační práce se zabývá navržením nízkonapěťových, nízkopříkonových analogových obvodů, které používají nekonvenční techniky CMOS. Lékařská zařízení na bateriové napájení, jako systémy pro dlouhodobý fyziologický monitoring, přenosné systémy, implantovatelné systémy a systémy vhodné na nošení, musí být male a lehké. Kromě toho je nutné, aby byly tyto systémy vybaveny baterií s dlouhou životností. Z tohoto důvodu převládají v biomedicínských aplikacích tohoto typu nízkopříkonové integrované obvody. Nekonvenční techniky jako např. využití transistorů s řízeným substrátem (Bulk-Driven “BD”), s plovoucím hradlem (Floating-Gate “FG”), s kvazi plovoucím hradlem (Quasi-Floating-Gate “QFG”), s řízeným substrátem s plovoucím hradlem (Bulk-Driven Floating-Gate “BD-FG”) a s řízeným substrátem s kvazi plovoucím hradlem (Bulk-Driven Quasi-Floating-Gate “BD-QFG”), se v nedávné době ukázaly jako efektivní prostředek ke zjednodušení obvodového zapojení a ke snížení velikosti napájecího napětí směrem k prahovému napětí u tranzistorů MOS (MOST). V práci jsou podrobně představeny nejdůležitější charakteristiky nekonvenčních technik CMOS. Tyto techniky byly použity pro vytvoření nízko napěťových a nízko výkonových CMOS struktur u některých aktivních prvků, např. Operational Transconductance Amplifier (OTA) založené na BD, FG, QFG, a BD-QFG techniky; Tunable Transconductor založený na BD MOST; Current Conveyor Transconductance Amplifier (CCTA) založený na BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) založený na BD MOST; Winner Take All (WTA) and Loser Take All (LTA) založený na BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) založený na BD-QFG technice. Za účelem ověření funkčnosti výše zmíněných struktur, byly tyto struktury použity v několika aplikacích. Výkon navržených aktivních prvků a příkladech aplikací je ověřován prostřednictvím simulačních programů PSpice či Cadence za použití technologie 0.18 m CMOS.This doctoral thesis deals with designing ultra-low-voltage (LV) low-power (LP) analog circuits utilizing the unconventional CMOS techniques. Battery powered medical devices such as; long term physiological monitoring, portable, implantable, and wearable systems need to be small and lightweight. Besides, long life battery is essential need for these devices. Thus, low-power integrated circuits are always paramount in such biomedical applications. Recently, unconventional CMOS techniques i.e. Bulk-Driven (BD), Floating-Gate (FG), Quasi-Floating-Gate (QFG), Bulk-Driven Floating-Gate (BD-FG) and Bulk-Driven Quasi-Floating-Gate (BD-QFG) MOS transistors (MOSTs) have revealed as effective devices to reduce the circuit complexity and push the voltage supply of the circuit towards threshold voltage of the MOST. In this work, the most important features of the unconventional CMOS techniques are discussed in details. These techniques have been utilized to perform ultra-LV LP CMOS structures of several active elements i.e. Operational Transconductance Amplifier (OTA) based on BD, FG, QFG, and BD-QFG techniques; Tunable Transconductor based on BD MOST; Current Conveyor Transconductance Amplifier (CCTA) based on BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) based on BD MOST; Winner Take All (WTA) and Loser Take All (LTA) based on BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) based on BD-QFG technique. Moreover, to verify the workability of the proposed structures, they were employed in several applications. The performance of the proposed active elements and their applications were investigated through PSpice or Cadence simulation program using 0.18 m CMOS technology.

Low Voltage Low Power Analogue Circuits Design

Disertační práce je zaměřena na výzkum nejběžnějších metod, které se využívají při návrhu analogových obvodů s využití nízkonapěťových (LV) a nízkopříkonových (LP) struktur. Tyto LV LP obvody mohou být vytvořeny díky vyspělým technologiím nebo také využitím pokročilých technik návrhu. Disertační práce se zabývá právě pokročilými technikami návrhu, především pak nekonvenčními. Mezi tyto techniky patří využití prvků s řízeným substrátem (bulk-driven - BD), s plovoucím hradlem (floating-gate - FG), s kvazi plovoucím hradlem (quasi-floating-gate - QFG), s řízeným substrátem s plovoucím hradlem (bulk-driven floating-gate - BD-FG) a s řízeným substrátem s kvazi plovoucím hradlem (quasi-floating-gate - BD-QFG). Práce je také orientována na možné způsoby implementace známých a moderních aktivních prvků pracujících v napěťovém, proudovém nebo mix-módu. Mezi tyto prvky lze začlenit zesilovače typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za účelem potvrzení funkčnosti a chování výše zmíněných struktur a prvků byly vytvořeny příklady aplikací, které simulují usměrňovací a induktanční vlastnosti diody, dále pak filtry dolní propusti, pásmové propusti a také univerzální filtry. Všechny aktivní prvky a příklady aplikací byly ověřeny pomocí PSpice simulací s využitím parametrů technologie 0,18 m TSMC CMOS. Pro ilustraci přesného a účinného chování struktur je v disertační práci zahrnuto velké množství simulačních výsledků.The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the non–conventional ones which are bulk–driven (BD), floating–gate (FG), quasi–floating–gate (QFG), bulk–driven floating–gate (BD–FG) and bulk–driven quasi–floating–gate (BD–QFG) techniques. The thesis also looks at ways of implementing structures of well–known and modern active elements operating in voltage–, current–, and mixed–mode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fully–differential second generation current conveyor (FB–CCII), fully–balanced differential difference amplifier (FB–DDA), voltage differencing transconductance amplifier (VDTA), current–controlled current differencing buffered amplifier (CC–CDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diode–less rectifier and inductance simulations, as well as low–pass, band–pass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.

Technical Institute, Kevin Street : Prospectus, 1939- 40

Courses and timetables for Dublin Institute of Technology, Kevin Street

DC Motor PID Control System for Tamarind Turmeric Herb Packaging on Rotary Cup Sealer Machine

The end of this research is to find PID tuning value on the packaging automation process using the PID method. By finding the most suitable PID tuning value, a fast packaging process is obtained. Herbal ingredients in herbs that are left in the open for a long time tend to be damaged more quickly. So after the production process ends, the herbs must be packaged quickly. With the packaging automation method, the product can be hygienic and does not spoil quickly. One of the most widely and easy-to-use for automation methods in the industry is the PID control method because it can accelerate the system response, stabilize the system to match the setpoint and minimize overshoot. This study will discuss how the design of the PID control system using DC motor transfer function modeling in Matlab and the Second Ziegler-Nichols PID tuning method, the effect of the load on the motor response, and the effect of PID on the production speed. The system was tested with PID tuning values are Kp = 12, Ki = 12,506, Kd = 0.0028785, speed motor 24 RPM and a load of 3,160 Kg produces a good output response are delay time = 0.502 s, rise time = 0.804 s, settling time = 4.023 s, peak time = 133.084 s, Overshoot = 0.125% and Steady State Error = 0%. The effect of PID control on production speed is 83% faster than manual production and 29% faster than systems without PID

Technical Institute, Kevin Street: Prospectus 1938-39

Courses and timetables for Dublin Institute of Technology, Kevin Street

Design and development of a particulate emission monitor

In the last two decades, numerous studies have revealed that atmospheric particulates and especially those emitted by diesel engined vehicles pose a serious health and environmental hazard. This thesis describes the design and development of a co-axial capacitance transducer as well as the ancillary solids dispersion production unit for the on-line measurement of particulates concentration in air in real time basis. The primary application of the device is as a particulate monitor for diesel engine exhausts although the reported experimental results also evaluate and establish its feasibility for monitoring solids/gas dispersions during their pneumatic conveying. Briefly, the transducer comprises two different diameter metallic cylindrical electrodes placed co-axially within one another so that an annulus is formed. The latter constitutes the sensing volume of the capacitance transducer following the application of a voltage between the two electrodes. The principle of the operation of the device relies on the fact that the effective dielectric constant of a solids-gas dispersion driven between the electrodes is proportional to the concentration of the entrained solids. In practice therefore, the concentration of a test powder is determined by measuring capacitance and referring to a previously prepared calibration chart. The feasibility and reliability of the transducer have been verified by conducting a series of experiments investigating its performance characteristics in response to changes in a number of design and operating parameters in conjunction with different powders of various size, density, and electrical properties. The design parameters investigated include variations in electrode diameters, length and separation distance. The various operating parameters on the other hand deal with changes in air relative humidity (8 - 78 %), temperature (20 °C - 100 °C), flow velocity (6.5 - 15 ms-1), solids flow pattern (e.g. from homogeneous to slug flow) as well as variations in the frequency of the applied voltage (1-100 kHz). The results indicate that the transducer's sensitivity increases with a decrease in the separation distance between the two cylindrical electrodes, whereas the electrodes' length has no profound effect on it. On the other hand, the effective dielectric constant, ϵeff of all solids-gas dispersions tested was found to be directly proportional to the solids concentration and unaffected by variations in air humidity, air velocity, electric field frequency, and solids flow regime. However, ϵeff for dispersions of insulating powders, in contrast to that of conducting powders, was found to be dependent on the respective dielectric constant of the solid particles as well as their size. Furthermore, in the case of mixtures of two insulating powders simultaneously dispersed in air, ϵeff was found to be dependent not only to the total solids concentration but also on the volumetric ratio of the two powders in the mixture. The transducer's baseline capacitance (zero solids concentration) varied linearly with the average surface temperature of the cylindrical electrodes. Finally, a 'temperature capacitor coefficient' was calculated in order to account for the effect of temperature on capacitance. This was found to be in close agreement with the coefficient of thermal expansion of the electrodes' material of construction (c.f. 0.0001/°C with 0.00012/°C)

Microcontroller Based Automatic Power Factor Correction in Mines

With the mining industry moving from traditional manual methods to the advanced mechanised mining, the focus is also shifting to the energy efficiency of the equipment and system being employed. Most of the equipment used in mining like shovel, drill, elevator, continues miner, conveyor, pumps etc. runs on electricity. Electric energy being the only form of energy which can be easily converted to any other form plays a vital role for the growth of any industry. The Power Factor gives an idea about the efficiency of the system to do useful work out of the supplied electric power. A low value of power factor leads to increase is electric losses and also draws penalty by the utility. Significant savings in utility power costs can be realized by keeping up an average monthly power factor close to unity. The work carried out is concerned with developing power factor correction equipment based on embedded system which can automatically monitor the power factor in the mining electrical system and take care of the switching process to maintain a desired level of power factor which fulfils the standard norms. The Automatic Power Factor Correction (APFC) device developed is based on embedded system having 89S52 microcontroller at its core. The voltage and current signal from the system is sampled and taken as input to measure the power factor and if it falls short of the specified value by utility, then the device automatically switch on the capacitor banks to compensate for the reactive power. After employing the correction equipment the targeted power factor of 0.95 is achieved and the increase in power factor varied from 9% to 19% based on the combination of load. There is also a decrease of 1.7% in the total energy consumption due to reduction in load current. The economic analysis for power factor improvement considering the data from a local coal mine suggested the payback period to be around 9 months if the correction equipment is implemente