Connecting the World of Embedded Mobiles: The RIOT Approach to Ubiquitous Networking for the Internet of Things

The Internet of Things (IoT) is rapidly evolving based on low-power compliant protocol standards that extend the Internet into the embedded world. Pioneering implementations have proven it is feasible to inter-network very constrained devices, but had to rely on peculiar cross-layered designs and offer a minimalistic set of features. In the long run, however, professional use and massive deployment of IoT devices require full-featured, cleanly composed, and flexible network stacks. This paper introduces the networking architecture that turns RIOT into a powerful IoT system, to enable low-power wireless scenarios. RIOT networking offers (i) a modular architecture with generic interfaces for plugging in drivers, protocols, or entire stacks, (ii) support for multiple heterogeneous interfaces and stacks that can concurrently operate, and (iii) GNRC, its cleanly layered, recursively composed default network stack. We contribute an in-depth analysis of the communication performance and resource efficiency of RIOT, both on a micro-benchmarking level as well as by comparing IoT communication across different platforms. Our findings show that, though it is based on significantly different design trade-offs, the networking subsystem of RIOT achieves a performance equivalent to that of Contiki and TinyOS, the two operating systems which pioneered IoT software platforms

MGSim - Simulation tools for multi-core processor architectures

MGSim is an open source discrete event simulator for on-chip hardware components, developed at the University of Amsterdam. It is intended to be a research and teaching vehicle to study the fine-grained hardware/software interactions on many-core and hardware multithreaded processors. It includes support for core models with different instruction sets, a configurable multi-core interconnect, multiple configurable cache and memory models, a dedicated I/O subsystem, and comprehensive monitoring and interaction facilities. The default model configuration shipped with MGSim implements Microgrids, a many-core architecture with hardware concurrency management. MGSim is furthermore written mostly in C++ and uses object classes to represent chip components. It is optimized for architecture models that can be described as process networks.Comment: 33 pages, 22 figures, 4 listings, 2 table

Profiling I/O interrupts in modern architectures

Journal ArticleAs applications grow increasingly communication-oriented, interrupt performance quickly becomes a crucial component of high performance I/O system design. At the same time, accurately measuring interrupt handler performance is difficult with the traditional simulation, instrumentation, or statistical sampling approaches. One o f the most important components o f interrupt performance is cache behavior. This paper presents a portable method for measuring the cache effects o f I/O interrupt handling using native hardware performance counters. To provide a portability stress test, the method is demonstrated on two commercial platforms with different architectures, the SGI Origin 200 and the Sun LJltra-1. This case study uses the methodology to measure the overhead of the two most common forms o f interrupt traffic: disk and network interrupts. The study demonstrates that the method works well and is reasonably robust. In addition, the results show that disk interrupts behave similar on both platforms, while differences in OS organization cause network interrupts to behave very differently. Furthermore, network interrupts exhibit significantly larger cache footprints.

OPERATING SYSTEM FOR WIRELESS SENSOR NETWORKS AND AN EXPERIMENT OF PORTING CONTIKIOS TO MSP430 MICROCONTROLLER

Wireless Sensor Networks (WSNs) consist of a large number of sensor nodes, and are used for various applications such as building monitoring, environment control, wild-life habitat monitoring, forest fire detection, industry automation, military, security, and health-care. Each sensor node needs an operating system (OS) that can control the hardware, provide hardware abstraction to application software, and fill in the gap between applications and the underlying hardware. In this paper, researchers present OS for WSNs and an experiment of porting contikiOS to MSP430 microcontroller which is very popular in many hardware platforms for WSNs. Researchers begin by presenting the major issues for the design of OS for WSNs. Then, researchers examine some popular operating systems for WSNs including TinyOS, ContikiOS, and LiteOS. Finally, researchers present an experiment of porting ContikiOS to MSP430 microcontroller. Wireless Sensor Networks (WSNs) terdiri dari sejumlah besar sensor nodes, dan digunakan untuk berbagai aplikasi seperti pemantauan gedung, pengendalian lingkungan, pemantauan kehidupan habitat liar, deteksi kebakaran hutan, otomatisasi industri, militer, keamanan, dan kesehatan. Setiap sensor nodememerlukan sistem operasi (SO) yang dapat mengontrol hardware, menyediakan abstraksi hardware untuk aplikasi perangkat lunak, dan mengisi kesenjangan antara aplikasi dan hardware. Dalam penelitian ini, peneliti menyajikan SO untuk WSNs dan percobaan dari port contikiOS untuk MSP430 mikrokontroler yang sangat populer di platformhardware untuk WSNs. Peneliti memulai dengan menghadirkan isu utama yaitu desain SO untuk WSNs. Lalu, penelitimemeriksa beberapa sistem operasi populer untuk WSNs, termasuk TinyOS, ContikiOS, dan LiteOS. Akhirnya penelitimenyajikan sebuah percobaan dari port ContikiOS untuk MSP430 mikrokontroler

Implementation of Parallel Search Algorithm in Computational Biology

Bioinformatics and Computational Biology are rapidly growing multidisciplinary fields, which includes wide variety of domains from DNA sequencing to sequence alignments. Recent advances in both these disciplines have allowed biologists all around the world to quickly gather a huge amount of DNA sequence data for analysis. DNA sequence alignments are becoming ever more popular due their impact in early disease diagnosis, in drug engineering, as well as in criminal investigations. With the vast growth and popularity of biological data, searching for a DNA sequence of interest in huge databases is not an easy task to produce results within a realistic time, hence there is a need to enhance the efficiency. The reason why such information is so popular is because biologists can identify genetic information by finding sequences of similar genes or proteins with known behavior or structure without requiring long and expensive laboratory experiments. One of the most widely used tools for performing searches is Basic Local Alignment Search Tool (BLAST), a program for performing pairwise sequence alignments. As the BLAST program becomes ever more popular with biologists around the world, it faces numerous challenges. One of the main challenges is the issue of performance. The BLAST program has been looked at by researchers on how to improve the speed of search by reducing overhead costs. One of the ways to reduce the overhead cost is to incorporate parallelism to improve the performance of the BLAST algorithm. For this paper, I explored existing variations of parallel implementations of the BLAST algorithm and compared its performance improvements with that of serial implementation of BLAST. The speed-up efficiency noted by the parallel program is far greater compared to the serial program. The paper sheds light on the impact of parallelization of the BLAST algorithm and the advantages it has on the overall field of computational biology