Improved reversible and quantum circuits for Karatsuba-based integer multiplication

Integer arithmetic is the underpinning of many quantum algorithms, with applications ranging from Shor\u27s algorithm over HHL for matrix inversion to Hamiltonian simulation algorithms. A basic objective is to keep the required resources to implement arithmetic as low as possible. This applies in particular to the number of qubits required in the implementation as for the foreseeable future this number is expected to be small. We present a reversible circuit for integer multiplication that is inspired by Karatsuba\u27s recursive method. The main improvement over circuits that have been previously reported in the literature is an asymptotic reduction of the amount of space required from O(n^1.585) to O(n^1.427). This improvement is obtained in exchange for a small constant increase in the number of operations by a factor less than 2 and a small asymptotic increase in depth for the parallel version. The asymptotic improvement are obtained from analyzing pebble games on complete ternary trees

Quantum Multiplier Based on Exponent Adder

Quantum multiplication is a fundamental operation in quantum computing. Most existing quantum multipliers require $O(n)$ qubits to multiply two $n$-bit integer numbers, limiting their applicability to multiply large integer numbers using near-term quantum computers. In this paper, we propose the Quantum Multiplier Based on Exponent Adder (QMbead), a new approach that addresses this limitation by requiring just $\log_2(n)$ qubits to multiply two $n$-bit integer numbers. QMbead uses a so-called exponent encoding to represent two multiplicands as two superposition states, respectively, and then employs a quantum adder to obtain the sum of these two superposition states, and subsequently measures the outputs of the quantum adder to calculate the product of the multiplicands. This paper presents two types of quantum adders based on the quantum Fourier transform (QFT) for use in QMbead. The circuit depth of QMbead is determined by the chosen quantum adder, being $O(\log^2 n)$ when using the two QFT-based adders. If leveraging a logarithmic-depth quantum adder, the time complexity of QMbead is $O(n \log n)$, identical to that of the fastest classical multiplication algorithm, Harvey-Hoeven algorithm. Interestingly, QMbead maintains an advantage over the Harvey-Hoeven algorithm, given that the latter is only suitable for excessively large numbers, whereas QMbead is valid for both small and large numbers. The multiplicand can be either an integer or a decimal number. QMbead has been successfully implemented on quantum simulators to compute products with a bit length of up to 273 bits using only 17 qubits. This establishes QMbead as an efficient solution for multiplying large integer or decimal numbers with many bits.Comment: 12 pages, 7 figure

RESOURCE EFFICIENT DESIGN OF QUANTUM CIRCUITS FOR CRYPTANALYSIS AND SCIENTIFIC COMPUTING APPLICATIONS

Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation. Up to a superpolynomial speedup has been reported for quantum algorithms in these areas. Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers. Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible. In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed. In this work, we propose quantum circuits for Galois and integer arithmetic. These quantum circuits are necessary building blocks to realize quantum algorithms. The design of resource efficient quantum circuits requires the designer takes into account the gate cost, quantum bit (qubit) cost, depth and garbage outputs of a quantum circuit. Existing quantum machines do not have many qubits meaning that circuits with high qubit cost cannot be implemented. In addition, quantum circuits are more prone to errors and garbage output removal adds to overall cost. As more gates are used, a quantum circuit sees an increased rate of failure. Failures and error rates can be countered by using quantum error correcting codes and fault tolerant implementations of universal gate sets (such as Clifford+T gates). However, Clifford+T gates are costly to implement with the T gate being significantly more costly than the Clifford gates. As a result, designers working with Clifford+T gates seek to minimize the number of T gates (T-count) and the depth of T gates (T-depth). In this work, we propose quantum circuits for Galois and integer arithmetic with lower T-count, T-depth and qubit cost than existing work. This work presents novel quantum circuits for squaring and exponentiation over binary extension fields (Galois fields of form GF(2 m )). The proposed circuits are shown to have lower depth, qubit and gate cost to existing work. We also present quantum circuits for the core operations of multiplication and division which enjoy lower T-count, T-depth and qubit costs compared to existing work. This work also illustrates the design of a T-count and qubit cost efficient design for the square root. This work concludes with an illustration of how the arithmetic circuits can be combined into a functional block to implement quantum image processing algorithms

Design and synthesis of reversible logic

Energy lost during computation is an important issue for digital design. Today, all electronics devices suffer from energy lost due to the conventional logic system used. The amount of energy loss in the form of heat leads to immense challenges in nowadays circuit design. To overcome that, reversible logic has been invented. Since properties of reversible logic differ greatly than conventional logic, synthesis methods used for conventional logic cannot be used in reversible logic. In this dissertation, we proposed new synthesis algorithms and several circuit designs using reversible logic

QUANTUM COMPUTING AND HPC TECHNIQUES FOR SOLVING MICRORHEOLOGY AND DIMENSIONALITY REDUCTION PROBLEMS

Tesis doctoral en período de exposición públicaDoctorado en Informática (RD99/11)(8908