Survivable algorithms and redundancy management in NASA's distributed computing systems

The design of survivable algorithms requires a solid foundation for executing them. While hardware techniques for fault-tolerant computing are relatively well understood, fault-tolerant operating systems, as well as fault-tolerant applications (survivable algorithms), are, by contrast, little understood, and much more work in this field is required. We outline some of our work that contributes to the foundation of ultrareliable operating systems and fault-tolerant algorithm design. We introduce our consensus-based framework for fault-tolerant system design. This is followed by a description of a hierarchical partitioning method for efficient consensus. A scheduler for redundancy management is introduced, and application-specific fault tolerance is described. We give an overview of our hybrid algorithm technique, which is an alternative to the formal approach given

Recent Advances in Graph Partitioning

We survey recent trends in practical algorithms for balanced graph partitioning together with applications and future research directions

Scheduling and partitioning Vlsi circuit operating at multiple supply voltages

With today\u27s increasingly large and complex digital integrated circuit (IC) and system-on-chip designs, power dissipation has emerged as a primary design consideration. Reduction of power consumption in VLSI designs can be achieved at various levels of the design hierarchy, ranging from processing technology, circuit, logic, architectural and algorithmic (behavioral) levels, up to system level. It has also been long recognized that the most dramatic power saving is achievable at the algorithm and architecture levels, where computations are normally described using data/control flow graph. Thus, in this thesis, a multiple supply voltage IC is synthesized at the behavior level; There are, however, a number of practical problems that must be overcome before use of multiple supply voltage becomes prevalent. In particular, lower power is achieved along with an expensive routing cost. Therefore, unlike the existing methods where only scheduling is considered, our synthesis scheme considers both scheduling and partitioning to reduce power consumption due to the functional units as well as the routing cost; The concerned problem is subsequently referred as the multiple voltage scheduling and partitioning problem (MVSP). The MVSP problem is proved to be NP-complete and three behavioral level synthesis algorithms are proposed to minimize power consumption with resources operating at multiple voltages. One is the polynomial time algorithm. The others are heuristic algorithms, which are tabu search algorithm (TS), and simulated annealing algorithm (SA); In the polynomial time algorithm, synthesis is based on the following three-step process. First, one particular supply voltage (selected from a finite and known number of supply voltage levels) is to be determined for each operation in a data flow graph. Then various operations are scheduled so that the power consumption under given time and/or resource constraints can be minimized. Finally, operations are partitioned into different regions running in different supply voltages to minimize the interconnection costs; In TS and SA algorithms, synthesis schemes are performed to minimize the power consumed by resources and interconnections. In particular, we have configured our solutions with a three-tuple vector to account for both the resource assignment and the partition of operation nodes. Special move operation is designed that allows the scheduling and the partitioning to be performed simultaneously; Experiments with a number of digital signal processing benchmarks show that the proposed algorithms achieve the power reduction at different percentage

A new exact algorithm for the multi-depot vehicle routing problem under capacity and route length constraints

This article presents an exact algorithm for the multi-depot vehicle routing problem (MDVRP) under capacity and route length constraints. The MDVRP is formulated using a vehicle-flow and a set-partitioning formulation, both of which are exploited at different stages of the algorithm. The lower bound computed with the vehicle-flow formulation is used to eliminate non-promising edges, thus reducing the complexity of the pricing subproblem used to solve the set-partitioning formulation. Several classes of valid inequalities are added to strengthen both formulations, including a new family of valid inequalities used to forbid cycles of an arbitrary length. To validate our approach, we also consider the capacitated vehicle routing problem (CVRP) as a particular case of the MDVRP, and conduct extensive computational experiments on several instances from the literature to show its effectiveness. The computational results show that the proposed algorithm is competitive against stateof-the-art methods for these two classes of vehicle routing problems, and is able to solve to optimality some previously open instances. Moreover, for the instances that cannot be solved by the proposed algorithm, the final lower bounds prove stronger than those obtained by earlier methods