Ultra-low power mixed-signal frontend for wearable EEGs

Electronics circuits are ubiquitous in daily life, aided by advancements in the chip design industry, leading to miniaturised solutions for typical day to day problems. One of the critical healthcare areas helped by this advancement in technology is electroencephalography (EEG). EEG is a non-invasive method of tracking a person's brain waves, and a crucial tool in several healthcare contexts, including epilepsy and sleep disorders. Current ambulatory EEG systems still suffer from limitations that affect their usability. Furthermore, many patients admitted to emergency departments (ED) for a neurological disorder like altered mental status or seizures, would remain undiagnosed hours to days after admission, which leads to an elevated rate of death compared to other conditions. Conducting a thorough EEG monitoring in early-stage could prevent further damage to the brain and avoid high mortality. But lack of portability and ease of access results in a long wait time for the prescribed patients. All real signals are analogue in nature, including brainwaves sensed by EEG systems. For converting the EEG signal into digital for further processing, a truly wearable EEG has to have an analogue mixed-signal front-end (AFE). This research aims to define the specifications for building a custom AFE for the EEG recording and use that to review the suitability of the architectures available in the literature. Another critical task is to provide new architectures that can meet the developed specifications for EEG monitoring and can be used in epilepsy diagnosis, sleep monitoring, drowsiness detection and depression study. The thesis starts with a preview on EEG technology and available methods of brainwaves recording. It further expands to design requirements for the AFE, with a discussion about critical issues that need resolving. Three new continuous-time capacitive feedback chopped amplifier designs are proposed. A novel calibration loop for setting the accurate value for a pseudo-resistor, which is a crucial block in the proposed topology, is also discussed. This pseudoresistor calibration loop achieved the resistor variation of under 8.25%. The thesis also presents a new design of a curvature corrected bandgap, as well as a novel DDA based fourth-order Sallen-Key filter. A modified sensor frontend architecture is then proposed, along with a detailed analysis of its implementation. Measurement results of the AFE are finally presented. The AFE consumed a total power of 3.2A (including ADC, amplifier, filter, and current generation circuitry) with the overall integrated input-referred noise of 0.87V-rms in the frequency band of 0.5-50Hz. Measurement results confirmed that only the proposed AFE achieved all defined specifications for the wearable EEG system with the smallest power consumption than state-of-art architectures that meet few but not all specifications. The AFE also achieved a CMRR of 131.62dB, which is higher than any studied architectures.Open Acces

ANALYSIS AND DESIGN OF AN ULTRA-LOW POWER LOW-NOISE DTMOS BASED INSTRUMENTATION AMPLIFIER APPLIED TO THE PHYSIOLOGICAL SIGNAL ACQUISITION SYSTEM

With the rapid development of Internet of Things (IoT) technology and the popularity of portable devices, portable medical devices will become widely available soon. Physiological signal monitoring sensors are widely used for personal health management and long-term healthcare monitoring, especially for preventing acute illnesses and chronic disease monitoring for pediatric and elderly. Physiological signal monitoring sensors have the ability to monitor people's behavior in real-time for various daily activities, such as physiological signals that exhibit different waveforms and amplitudes when sleeping and awake. The real-time collected signals can be frequently compared to medical databases to detect abnormal health data for preventive healthcare. Therefore, an accurate and error-free system that provides high-quality monitoring of physiological signals is very important. Typically, an instrumentation amplifier (IA) is used for high accurate acquisition and amplification within this system. An IA with excellent performance gives patients safer health conditions and allows patients to have better health protection.This work introduces an ultra-low-power instrumentation amplifier operating at sub-0.4V voltage. Using dynamic threshold voltage MOSFET (DTMOS). The DTMOS reduces threshold voltage further and increases the driven current while the device is operating. Therefore, the DTMOS-based folded-cascode has been chosen, resulting in an increases the common-mode rejection ratio (CMRR) of the circuit while increasing the output signal swing compared over conventional topologies. The IA takes the benefit of the rail-to-rail common-mode feedback circuit and chopping to reduce flicker noise and DC offset. Reducing the chip area and power consumption leads to the output signal's high signal-to-noise ratio (SNR). The post-simulation shows that the circuit archives 45dB gain, DC to 2.07KHz operating bandwidth, and 0.8μW total power consumption. The simulated CMRR is 103dB, with 80dB power supply rejection ratio (PSRR). The simulated input reference noise is 140nV/√Hz (@100Hz) with 7.27 Noise Efficiency Factor (NEF).Keywords: Instrumentation Amplifier, DTMOS, rail-to-rail, chopping, clock boosting switch, physiological acquisition, bio-medical application

Interface Circuits for Microsensor Integrated Systems

ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.