14 research outputs found

    Wideband digital phase comparator for high current shunts

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    A wideband phase comparator for precise measurements of phase difference of high current shunts has been developed at INRIM. The two-input digital phase detector is realized with a precision wideband digitizer connected through a pair of symmetric active guarded transformers to the outputs of the shunts under comparison. Data are first acquired asynchronously, and then transferred from on-board memory to host memory. Because of the large amount of data collected the filtering process and the analysis algorithms are performed outside the acquisition routine. Most of the systematic errors can be compensated by a proper inversion procedure. The system is suitable for comparing shunts in a wide range of currents, from several hundred of milliampere up to 100 A, and frequencies ranging between 500 Hz and 100 kHz. Expanded uncertainty (k=2) less than 0.05 mrad, for frequency up to 100 kHz, is obtained in the measurement of the phase difference of a group of 10 A shunts, provided by some European NMIs, using a digitizer with sampling frequency up to 1 MHz. An enhanced version of the phase comparator employs a new digital phase detector with higher sampling frequency and vertical resolution. This permits to decrease the contribution to the uncertainty budget of the phase detector of a factor two from 20 kHz to 100 kHz. Theories and experiments show that the phase difference between two high precision wideband digitizers, coupled as phase detector, depends on multiple factors derived from both analog and digital imprint of each sampling system.Comment: 20 pages, 9 figure

    Realization of an Inductance Scale Traceable to the Quantum Hall Effect Using an Automated Synchronous Sampling System

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    In this paper, the realization of an inductance scale from 1~ÎĽ\muH to 10~H for frequencies ranging between 50~Hz to 20~kHz is presented. The scale is realized directly from a series of resistance standards using a fully automated synchronous sampling system. A careful systematic characterization of the system shows that the lowest uncertainties, around 12~ÎĽ\muH/H, are obtained for inductances in the range from 10~mH to 100~mH at frequencies in the kHz range. This new measurement system which was successfully evaluated during an international comparison, provides a primary realization of the henry, directly traceable to the quantum Hall effect. An additional key feature of this system is its versatility. In addition to resistance-inductance (R-L) comparison, any kind of impedances can be compared: R-R, R-C, L-L or C-C, giving this sampling system a great potential of use in many laboratories around the world

    Characterization of the amplitude frequency response of Analog-to-Digital Converters

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    This paper describes a method for the characterization of the amplitude frequency response of Analog-to-Digital converters at frequencies up to 20 kHz using a true quantum reference calibrated semiconductor based DAC arbitrary waveform generator, developed within the EMPIR project Q-WAVE, jointly founded by the European Union and the partipating countries. The procedure that can be used for the characterization of any ADC is appplied to de DCV function of a Keysight 3458A digital multimeter. The measurement conditions an the main uncertainty sources are identified and evaluated for complete uncertainty estimation by means of the Monte Carlo Method

    A Comprehensive Analysis of Error Sources in Electronic Fully Digital Impedance Bridges

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    open12sìFully digital impedance bridges are emerging as measuring instruments for primary electrical impedance metrology and the realization of impedance units and scales. This article presents a comprehensive analysis of electronic fully digital impedance bridges for both generating (based on digital-to-analog converters) and digitizing (based on analog-to-digital converters) bridges. The sources of measurement error are analyzed in detail and expressed by explicit mathematical formulas ready to be applied to the specific bridge and measurement case of interest. The same can be employed also as a basis to optimize the design and the operating parameters of digital bridges and evaluate the measurement uncertainty. A practical application of the analysis to the digital bridges developed and measurements performed in the framework of an international research project is presented.openOrtolano, Massimo; Marzano, Martina; D'Elia, Vincenzo; Mai Tran, Ngoc Thanh; Rybski, Ryszard; Kaczmarek, Janusz; Koziol, Miroslaw; Musiol, Krzysztof; Christensen, Andreas Elmholdt; Callegaro, Luca; Kucera, Jan; Power, OliverOrtolano, Massimo; Marzano, Martina; D'Elia, Vincenzo; Mai Tran, Ngoc Thanh; Rybski, Ryszard; Kaczmarek, Janusz; Koziol, Miroslaw; Musiol, Krzysztof; Christensen, Andreas Elmholdt; Callegaro, Luca; Kucera, Jan; Power, Olive

    Josephson Wellenform Charakterisierung eines Sigma-Delta Analog/Digital Wandlers zur Datenerfassung in der Metrologie

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    A sampling system based on a 24-bits sigma-delta analog-to-digital converter (ADC) was built and characterized in order to study the feasibility of using this type of ADCs in electrical metrology. The non-linearities of the sampling system have been studied and a model for postcorrecting the measured data points established. The Hammerstein model, consisting of a static non-linear part and a linear system, was employed. A 4-th order polynomial accounts for the non-linearities of the analog electronics and the input stages of the sigma delta ADC. The linear part corresponds to the transfer function of the decimation filters internal to the ADC. The parameters for the model of the system were determined using noiseless and drift-free waveforms from a Josephson waveform synthesizer. The performance of the sampling system was verified experimentally by comparing the measured root-mean-square (rms) value of sinusoidal signals with the results from an established method. The results obtained using the post-corrected samples from the sampling system at 125 Hz agreed to within 2 μV/V with the de facto standard in metrology laboratories, which uses a high accuracy digital voltmeter. Precision measurements are limited by the decimation filters inside the ADC and can only be carried out for frequencies below 1/24-th of the equivalent sampling rate. The characterization results have shown that the non-linearities have been compensated to 5 μV/V or better and the effective resolution exceeds 20 bits, over an input range of 1 V at the equivalent sampling rate of 32 kHz. The experimental validation has proved that it is possible to measure rms values of sinusoidal signals with 1 V peak amplitudes for frequencies up to 1.3 kHz with uncertainty of 8 μV/V, significantly improving the uncertainty achievable with de facto standard which reaches 8 μV/V at 500 Hz.Ein Abtastsystem basierend auf einem 24-Bit Sigma-Delta Analog-DigitalWandler (ADC) wurde gebaut und charakterisiert, um die Möglichkeiten eines solchen ADC-Typs für Anwendungen in der elektrischen Metrologie zu untersuchen. Die Nichtlinearitäten des Abtastsystems wurden bestimmt und ein Modell für die nachträgliche Korrektur der erfassten Abtastwerte entwickelt. Dafür wurde das Hammerstein Modell verwendet, das zur Charakterisierung eines statisch, nichtlinearen Blocks gefolgt von einem linearen Teil geeignet ist. Ein Polynom vierter Ordnung wurde zur Beschreibung der statischen Nichtlinearität in der analogen Elektronik und der Eingangsstufe des Sigma-Delta ADC verwendet. Der lineare Teil des Modells umfasst die Transferfunktion des Dezimationsfilters im ADC Chip. Die Parameter für das Modell wurden mithilfe rausch- und driftloser Signale von einem Josephson Wellenform Synthesizer ermittelt. Die Leistungsfähigkeit des Abtastsystems wurde experimentell durch Effektivwertmessungen (rms) von sinusförmigen Signalen mit einem etablierten Messverfahren überprüft. Als Ergebnis wurde eine Übereinstimmung innerhalb von 2 μV/V bei 125 Hz mit dem de facto Normal der metrologischen Kalibrierlabore gefunden, das auf einem hochpräzisen Digitalvoltmeter basiert. Präzisionsmessungen haben ergeben, dass die Dezimationsfilter im ADC die maximale Frequenz auf 1/24stel der äquivalenten Abtastrate begrenzen, wenn die bestmöglichen Unsicherheiten erreicht werden sollen. Die Ergebnisse der Systemcharakterisierung haben bestätigt, dass Nichtlinearitäten auf 5 μV/V oder besser kompensiert werden. Die effektive Auflösung überschreitet 20 Bit über einen Eingangsbereich von 1 V und mit einer äquivalenten Abtastrate von 32 kHz. Die experimentelle Überprüfung hat gezeigt, dass es mit dem neuen System möglich ist, den Effektivwert sinusförmiger Signale und 1 V Amplitude für Frequenzen bis 1,3 kHz mit einer Messunsicherheit von 8 μV/V zu bestimmen, und somit die erreichbare Messunsicherheit des de facto Normals, das 8 μV/V bei 500 Hz erreicht, deutlich zu verbessern

    Digital instrumentation for the measurement of high spectral purity signals

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    Improvements on electronic technology in recent years have allowed the application of digital techniques in time and frequency metrology where low noise and high accuracy are required, yielding flexibility in systems implementation and setup. This results in measurement systems with extended capabilities, additional functionalities and ease of use. The Analog to Digital Converters (ADCs) and Digital to Analog Converters (DACs), as the system front-end, set the ultimate performance of the system in terms of noise. The noise characterization of these components will allow performing punctual considerations on the study of the implementation feasibility of new techniques and for the selection of proper components according to the application requirements. Moreover, most commercial platforms based on FPGA are clocked by quartz oscillators whose accuracy and frequency stability are not suitable for many time and frequency applications. In this case, it is possible to take advantage of the internal Phase Locked Loop (PLL) for generating the internal clock from an external frequency reference. However, the PLL phase noise could degrade the oscillator stability thereby limiting the entire system performance becoming a critical component for digital instrumentation. The information available currently in literature, describes in depth the features of these devices at frequency offsets far from the carrier. However, the information close to the carrier is a more important concern for time and frequency applications. In this frame, my PhD work is focused on understanding the limitations of the critical blocks of digital instrumentation for time and frequency metrology. The aim is to characterize the noise introduced by these blocks and in this manner to be able to predict their effects on a specific application. This is done by modeling the noise introduced by each component and by describing them in terms of general and technical parameters. The parameters of the models are identified and extracted through the corresponding method proposed accordingly to the component operation. This work was validated by characterizing a commercially available platform, Red Pitaya. This platform is an open source embedded system whose resolution and speed (14 bit, 125 MSps) are reasonably close to the state of the art of ADCs and DACs (16 bit, 350 MSps or 14 bit, 1 GSps/3GSPs) and it is potentially sufficient for the implementation of a complete instrument. The characterization results lead to the noise limitations of the platform and give a guideline for instrumentation design techniques. Based on the results obtained from the noise characterization, the implementation of a digital instrument for frequency transfer using fiber link was performed on the Red Pitaya platform. In this project, a digital implementation for the detection and compensation of the phase noise induced by the fiber is proposed. The beat note, representing the fiber length variations, is acquired directly with a high speed ADC followed by a fully digital phase detector. Based on the characterization results, it was expected a limitation in the phase noise measurement given by the PLL. First measurements of this implementation were performed using the 150 km-long buried fibers, placed in the same cables between INRiM and the Laboratoire Souterrain de Modane (LSM) on the Italy-France border. The two fibers are joined together at LSM to obtain a 300 km loop with both ends at INRiM. From these results the noise introduced by the digital system was verified in agreement with characterization results. Further test and improvements will be performed for having a finished system which is intended to be used on the Italian Link for Frequency and Time from Turin to Florence that is 642-km long and to its extension in the rest of Italy that is foreseen in the next future. Currently, a higher performance platform is under assessment by applying the tools and concepts developed along the PhD. The purpose of this project is the implementation of a state of the art phasemeter whose architecture is based on the DAC. In order to estimate the ultimate performance of the instrument, the DAC characterization is under development and preliminary measurements are also reported here

    NASA metrology and calibration, 1993

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    Th sixteenth annual workshop of NASA's Metrology and Calibration Working Group was held April 20-22, 1993. The goals of the Working Group are to provide Agencywide standardization of individual metrology programs, where appropriate; to promote cooperation and exchange of information within NASA, with other Government agencies, and with industry; to serve as the primary Agency interface with the National Institute of Standards and Technology; and to encourage formal quality control techniques such as Measurement Assurance Programs. These proceedings contain unedited reports and presentations from the workshop and are provided for information only

    A novel setup for trapping and cooling Barium ions for atom-ion experiments

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    L'abstract è presente nell'allegato / the abstract is in the attachmen

    Science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems

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    We present the science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems, targeting an evolution in technology, that might lead to impacts and benefits reaching into most areas of society. This roadmap was developed within the framework of the European Graphene Flagship and outlines the main targets and research areas as best understood at the start of this ambitious project. We provide an overview of the key aspects of graphene and related materials (GRMs), ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries. We also define an extensive list of acronyms in an effort to standardize the nomenclature in this emerging field.Peer ReviewedPostprint (published version
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