2,946 research outputs found
Towards Verifying Nonlinear Integer Arithmetic
We eliminate a key roadblock to efficient verification of nonlinear integer
arithmetic using CDCL SAT solvers, by showing how to construct short resolution
proofs for many properties of the most widely used multiplier circuits. Such
short proofs were conjectured not to exist. More precisely, we give n^{O(1)}
size regular resolution proofs for arbitrary degree 2 identities on array,
diagonal, and Booth multipliers and quasipolynomial- n^{O(\log n)} size proofs
for these identities on Wallace tree multipliers.Comment: Expanded and simplified with improved result
Extending ACL2 with SMT Solvers
We present our extension of ACL2 with Satisfiability Modulo Theories (SMT)
solvers using ACL2's trusted clause processor mechanism. We are particularly
interested in the verification of physical systems including Analog and
Mixed-Signal (AMS) designs. ACL2 offers strong induction abilities for
reasoning about sequences and SMT complements deduction methods like ACL2 with
fast nonlinear arithmetic solving procedures. While SAT solvers have been
integrated into ACL2 in previous work, SMT methods raise new issues because of
their support for a broader range of domains including real numbers and
uninterpreted functions. This paper presents Smtlink, our clause processor for
integrating SMT solvers into ACL2. We describe key design and implementation
issues and describe our experience with its use.Comment: In Proceedings ACL2 2015, arXiv:1509.0552
Formalization of Transform Methods using HOL Light
Transform methods, like Laplace and Fourier, are frequently used for
analyzing the dynamical behaviour of engineering and physical systems, based on
their transfer function, and frequency response or the solutions of their
corresponding differential equations. In this paper, we present an ongoing
project, which focuses on the higher-order logic formalization of transform
methods using HOL Light theorem prover. In particular, we present the
motivation of the formalization, which is followed by the related work. Next,
we present the task completed so far while highlighting some of the challenges
faced during the formalization. Finally, we present a roadmap to achieve our
objectives, the current status and the future goals for this project.Comment: 15 Pages, CICM 201
10271 Abstracts Collection -- Verification over discrete-continuous boundaries
From 4 July 2010 to 9 July 2010, the Dagstuhl Seminar 10271
``Verification over discrete-continuous boundaries\u27\u27
was held in Schloss Dagstuhl~--~Leibniz Center for Informatics.
During the seminar, several participants presented their current
research, and ongoing work and open problems were discussed. Abstracts of
the presentations given during the seminar as well as abstracts of
seminar results and ideas are put together in this paper. The first section
describes the seminar topics and goals in general.
Links to extended abstracts or full papers are provided, if available
Doctor of Philosophy
dissertationWith the spread of internet and mobile devices, transferring information safely and securely has become more important than ever. Finite fields have widespread applications in such domains, such as in cryptography, error correction codes, among many others. In most finite field applications, the field size - and therefore the bit-width of the operands - can be very large. The high complexity of arithmetic operations over such large fields requires circuits to be (semi-) custom designed. This raises the potential for errors/bugs in the implementation, which can be maliciously exploited and can compromise the security of such systems. Formal verification of finite field arithmetic circuits has therefore become an imperative. This dissertation targets the problem of formal verification of hardware implementations of combinational arithmetic circuits over finite fields of the type F2k . Two specific problems are addressed: i) verifying the correctness of a custom-designed arithmetic circuit implementation against a given word-level polynomial specification over F2k ; and ii) gate-level equivalence checking of two different arithmetic circuit implementations. This dissertation proposes polynomial abstractions over finite fields to model and represent the circuit constraints. Subsequently, decision procedures based on modern computer algebra techniques - notably, Gr¨obner bases-related theory and technology - are engineered to solve the verification problem efficiently. The arithmetic circuit is modeled as a polynomial system in the ring F2k [x1, x2, · · · , xd], and computer algebrabased results (Hilbert's Nullstellensatz) over finite fields are exploited for verification. Using our approach, experiments are performed on a variety of custom-designed finite field arithmetic benchmark circuits. The results are also compared against contemporary methods, based on SAT and SMT solvers, BDDs, and AIG-based methods. Our tools can verify the correctness of, and detect bugs in, up to 163-bit circuits in F2163 , whereas contemporary approaches are infeasible beyond 48-bit circuits
Functional Verification of Large-integers Circuits using a Cosimulation-based Approach
Cryptography and computational algebra designs are complex systems based on modular arithmetic and build on multi-level modules where bit-width is generally larger than 64-bit. Because of their particularity, such designs pose a real challenge for verification, in part because large-integer’s functions are not supported in actual hardware description languages (HDLs), therefore limiting the HDL testbench utility. In another hand, high-level verification approach proved its efficiency in the last decade over HDL testbench technique by raising the latter at a higher abstraction level. In this work, we propose a high-level platform to verify such designs, by leveraging the capabilities of a popular tool (Matlab/Simulink) to meet the requirements of a cycle accurate verification without bit-size restrictions and in multi-level inside the design architecture. The proposed high-level platform is augmented by an assertion-based verification to complete the verification coverage. The platform experimental results of the testcase provided good evidence of its performance and re-usability
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