Frequency Offset Correction in a Software Defined HiperLAN/2 Demodulator using Preamble Section A

In our Software Defined Radio project we perform a feasibility study of a software defined radio for two communication standards: HiperLAN/2 and Bluetooth. In this paper the Matlab/Simulink implementation of the HiperLAN/2 demodulator for the demonstrator of the project is discussed, with special attention for the frequency offset corrector. This type of correction is necessary to prevent large bit error rates that are caused by inter-subcarrier interference. The method that is proposed in this paper uses preamble section A to estimate the frequency offset. Simulation results for an AWGN channel show that the method is capable of correcting frequency offsets up to the boundary defined in the standard [1]. It was observed that frequency offset correction using only preamble section A is sensitive to ¿for example¿ synchronization errors in case real-life analog front-end signals are used

Design and implementation of synchronization and AGC for OFDM-based WLAN receivers

An efficient implementation of several tasks at the receiver becomes crucial in OFDM-based high-speed WLAN systems, such as automatic gain control, time and frequency synchronization and offset tracking. This paper deals with fixed point constraints and accuracy requirements for implementation of those algorithms. Also, a complete set of thresholds for the practical implementation of time and frequency synchronization sub-blocks is obtained. Moreover, a technique to mitigate the remaining frequency offset after coarse acquisition is proposed, yielding a good trade-off between performance and complexity. Finally, we propose the implementation of a simple and effective automatic gain control procedure.This work has been partially funded by Spanish government with project TIC 2002-03498 (ORISE), Telefonica I+D by the contract nº 25756, and the Chamber of Madrid Community and European Social Fund by a grant to the first author

Low-cost blind carrier frequency offset estimator for mimo multicarrier systems

Master'sMASTER OF ENGINEERIN

Subspace based carrier frequency offset estimations for OFDM systems

Master'sMASTER OF ENGINEERIN

FPGA implementation of an OFDM-based WLAN receiver

This paper deals with the design and implementation on FPGA of a receiver for OFDM-based WLAN. The circuit is particularized for IEEE 802.11a/g standards. The system includes frame detection, time and frequency synchronization, demodulation, equalization and phase tracking. The algorithms to be implemented for each task are selected taking into account performance, hardware cost and latency. Also, a fixed point analysis is made for each algorithm. Our objective is to maintain the PER loss below 0.5 dB for a PER = 10 -2, 64-QAM and error correction. The whole system is composed of two main blocks (correlator and CORDIC) that are reused in different time intervals to perform all the necessary operations, so the required hardware resources are minimized. To verify it, the receiver is physically implemented and tested. © 2011 Elsevier B.V. All rights reserved.This work was supported by the Spanish Ministerio de Educacion y Ciencia under grant TEC2008-06787.Canet Subiela, MJ.; Valls Coquillat, J.; Almenar Terré, V.; Marín-Roig Ramón, J. (2012). FPGA implementation of an OFDM-based WLAN receiver. Microprocessors and Microsystems. 36(3):232-244. https://doi.org/10.1016/j.micpro.2011.11.004S23224436