Marine power distribution system fault location using a portable injection unit

A portable injection unit for Active Impedance Estimation (AIE) is built and tested in a DC zonal marine power distribution system to provide useful information for system protection and restoration. The portable unit generates current “spikes” and injects them into the system once short circuit faults are detected (by measuring the system voltage drop). The faulted system impedance can be estimated by AIE and comparing the estimated impedance with the pre-calibrated value, the fault location can be determined. The proposed method does not rely on system fault transient information or communication from the remote-end measurement and offers fast and accurate fault location in DC marine distribution systems. The proposed method has been tested and validated on a 750V, 2 MW twin bus DC Commercial Test Facility with the system both de-energised and energised

A novel traveling-wave-based method improved by unsupervised learning for fault location of power cables via sheath current monitoring

In order to improve the practice in maintenance of power cables, this paper proposes a novel traveling-wave-based fault location method improved by unsupervised learning. The improvement mainly lies in the identification of the arrival time of the traveling wave. The proposed approach consists of four steps: (1) The traveling wave associated with the sheath currents of the cables are grouped in a matrix; (2) the use of dimensionality reduction by t-SNE (t-distributed Stochastic Neighbor Embedding) to reconstruct the matrix features in a low dimension; (3) application of the DBSCAN (density-based spatial clustering of applications with noise) clustering to cluster the sample points by the closeness of the sample distribution; (4) the arrival time of the traveling wave can be identified by searching for the maximum slope point of the non-noise cluster with the fewest samples. Simulations and calculations have been carried out for both HV (high voltage) and MV (medium voltage) cables. Results indicate that the arrival time of the traveling wave can be identified for both HV cables and MV cables with/without noise, and the method is suitable with few random time errors of the recorded data. A lab-based experiment was carried out to validate the proposed method and helped to prove the effectiveness of the clustering and the fault location

Agent Based Test and Repair of Distributed Systems

This article demonstrates how to use intelligent agents for testing and repairing a distributed system, whose elements may or may not have embedded BIST (Built-In Self-Test) and BISR (Built-In Self-Repair) facilities. Agents are software modules that perform monitoring, diagnosis and repair of the faults. They form together a society whose members communicate, set goals and solve tasks. An experimental solution is presented, and future developments of the proposed approach are explore

Amortising the Cost of Mutation Based Fault Localisation using Statistical Inference

Mutation analysis can effectively capture the dependency between source code and test results. This has been exploited by Mutation Based Fault Localisation (MBFL) techniques. However, MBFL techniques suffer from the need to expend the high cost of mutation analysis after the observation of failures, which may present a challenge for its practical adoption. We introduce SIMFL (Statistical Inference for Mutation-based Fault Localisation), an MBFL technique that allows users to perform the mutation analysis in advance against an earlier version of the system. SIMFL uses mutants as artificial faults and aims to learn the failure patterns among test cases against different locations of mutations. Once a failure is observed, SIMFL requires either almost no or very small additional cost for analysis, depending on the used inference model. An empirical evaluation of SIMFL using 355 faults in Defects4J shows that SIMFL can successfully localise up to 103 faults at the top, and 152 faults within the top five, on par with state-of-the-art alternatives. The cost of mutation analysis can be further reduced by mutation sampling: SIMFL retains over 80% of its localisation accuracy at the top rank when using only 10% of generated mutants, compared to results obtained without sampling

A Fault Injection Environment for Microprocessor-based Board

Evaluating the faulty behaviour of low-cost microprocessor-based boards is an increasingly important issue, due to their usage in many safety critical systems. To address this issue, the paper describes a software-implemented fault injection system based on the trace exception mode available in most microprocessors. The architecture of the complete fault injection environment is proposed, integrating modules for generating a fault list, for performing their injection and for gathering the results, respectively. Data gathered from some sample benchmark applications are presented The main advantages of the approach are low cost, good portability, and high efficienc

Testing a Quantum Computer

The problem of quantum test is formally addressed. The presented method attempts the quantum role of classical test generation and test set reduction methods known from standard binary and analog circuits. QuFault, the authors software package generates test plans for arbitrary quantum circuits using the very efficient simulator QuIDDPro[1]. The quantum fault table is introduced and mathematically formalized, and the test generation method explained.Comment: 15 pages, 17 equations, 27 tables, 8 figure

Fault Models for Quantum Mechanical Switching Networks

The difference between faults and errors is that, unlike faults, errors can be corrected using control codes. In classical test and verification one develops a test set separating a correct circuit from a circuit containing any considered fault. Classical faults are modelled at the logical level by fault models that act on classical states. The stuck fault model, thought of as a lead connected to a power rail or to a ground, is most typically considered. A classical test set complete for the stuck fault model propagates both binary basis states, 0 and 1, through all nodes in a network and is known to detect many physical faults. A classical test set complete for the stuck fault model allows all circuit nodes to be completely tested and verifies the function of many gates. It is natural to ask if one may adapt any of the known classical methods to test quantum circuits. Of course, classical fault models do not capture all the logical failures found in quantum circuits. The first obstacle faced when using methods from classical test is developing a set of realistic quantum-logical fault models. Developing fault models to abstract the test problem away from the device level motivated our study. Several results are established. First, we describe typical modes of failure present in the physical design of quantum circuits. From this we develop fault models for quantum binary circuits that enable testing at the logical level. The application of these fault models is shown by adapting the classical test set generation technique known as constructing a fault table to generate quantum test sets. A test set developed using this method is shown to detect each of the considered faults.Comment: (almost) Forgotten rewrite from 200

Fault location and diagnosis in a medium voltage EPR power cable

This paper presents a case study on fault location, characterization and diagnosis in a length of shielded 11 kV medium voltage ethylene-propylene rubber (EPR) power cable. The defect was identified on-site as a low resistance fault occurring between the sheath and the core. A 43 m section was removed for further analysis. The fault resistance was characterized and the location of the defect pinpointed to within a few cm using a combination of time-difference-of-arrival location and infra-red imaging. A combination of X-ray computed tomography, scanning electron microscopy and energy dispersive X-ray spectroscopy were then applied to characterize any abnormalities in the dielectric surrounding the breakdown region. A significant number of high density contaminants were found to be embedded in the dielectric layer, having an average diameter of the order of 100 um, a maximum diameter of 310 um and an average density of 1 particle per 2.28 mm3 . Scanning electron microscopy and energy-dispersive X-ray spectroscopy were used to determine the geometry and elemental composition of some initial contaminant samples. It was concluded that contamination of the EPR layer, combined with an observed eccentricity of the cable’s core and sheath resulting in a reduced insulation gap, may have led to an electric field concentration in the region of the defect sufficient to initiate breakdown. Preventative strategies are discussed for similar families of cables, including more stringent dielectric testing requirements at the manufacturing stage and PD monitoring to detect incipient failure